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soc/mediatek/common: Measure eDP initialization time

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Meaure the execution time for following eDP functions.
- dptx_check_sinkcap
- dptx_get_edid
- dptx_set_trainingstart
- mtk_edp_init

These dptx_* functions are the primary contributors to the execution
time of mtk_edp_init, which is only called in dev/recovery mode. This
insight can be used for future boot time optimization by breaking down
the eDP initialization process.

TEST=Boot with DEV mode using the boot image without serial console
support.
TEST=cbmem -c|grep "done after"
[INFO ]  dptx_check_sinkcap done after 38 msecs
[INFO ]  dptx_get_edid done after 294 msecs
[INFO ]  dptx_set_trainingstart done after 100 msecs
[INFO ]  mtk_edp_init done after 438 msecs

Change-Id: I7aabf3a33b9628f20fe16980033b00de9afc44e6
Signed-off-by: Yidi Lin <yidilin@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88584
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Yidi Lin 2025-07-28 15:09:56 +08:00
commit a70bf82036
3 changed files with 25 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

15
src/soc/mediatek/common/dp/dptx_common.c
View file

@ -11,6 +11,7 @@
#include <soc/dptx_reg.h>
#include <soc/dp_intf.h>
#include <string.h>
#include <timer.h>
static bool dptx_auxwrite_bytes(struct mtk_dp *mtk_dp, u8 cmd, u32 dpcd_addr,
size_t length, u8 *data)
@ -77,7 +78,9 @@ static int dptx_get_edid(struct mtk_dp *mtk_dp, struct edid *out)
u8 tmp = 0;
u8 extblock = 0;
size_t total_size;
struct stopwatch sw;
stopwatch_init(&sw);
dptx_auxwrite_dpcd(mtk_dp, DP_AUX_I2C_WRITE, 0x50, 0x1, &tmp);
/* Read 1st block */
@ -111,6 +114,9 @@ static int dptx_get_edid(struct mtk_dp *mtk_dp, struct edid *out)
}
mtk_dp->edid = out;
printk(BIOS_INFO, "%s done after %lld msecs\n", __func__,
stopwatch_duration_msecs(&sw));
return 0;
}
@ -404,7 +410,9 @@ static void dptx_set_dptxout(struct mtk_dp *mtk_dp)
static void dptx_check_sinkcap(struct mtk_dp *mtk_dp)
{
u8 buffer[16];
struct stopwatch sw;
stopwatch_init(&sw);
memset(buffer, 0x0, sizeof(buffer));
buffer[0] = 0x1;
@ -473,6 +481,8 @@ static void dptx_check_sinkcap(struct mtk_dp *mtk_dp)
dptx_auxread_dpcd(mtk_dp, DP_AUX_NATIVE_READ,
DPCD_00200, 0x2, buffer);
printk(BIOS_INFO, "%s done after %lld msecs\n", __func__,
stopwatch_duration_msecs(&sw));
}
void dptx_video_enable(struct mtk_dp *mtk_dp, bool enable)
@ -532,6 +542,9 @@ __weak void dptx_power_on(void) { /* do nothing */ };
int mtk_edp_init(struct mtk_dp *mtk_dp, struct edid *edid)
{
struct stopwatch sw;
stopwatch_init(&sw);
dptx_power_on();
dptx_init_variable(mtk_dp);
dptx_init_port(mtk_dp);
@ -555,6 +568,8 @@ int mtk_edp_init(struct mtk_dp *mtk_dp, struct edid *edid)
dp_intf_config(edid);
dptx_video_config(mtk_dp);
printk(BIOS_INFO, "%s done after %lld msecs\n", __func__,
stopwatch_duration_msecs(&sw));
return 0;
}

5
src/soc/mediatek/common/dp/dptx_v1.c
View file

@ -12,6 +12,7 @@
#include <soc/dptx_reg.h>
#include <soc/dp_intf.h>
#include <string.h>
#include <timer.h>
static void dptx_training_checkswingpre(struct mtk_dp *mtk_dp,
u8 target_lane_count,
@ -364,7 +365,9 @@ int dptx_set_trainingstart(struct mtk_dp *mtk_dp)
u8 buffer;
u8 limit;
u8 max_linkrate;
struct stopwatch sw;
stopwatch_init(&sw);
buffer = 0x1;
dptx_auxwrite_dpcd(mtk_dp, DP_AUX_NATIVE_WRITE,
DPCD_00600, 0x1, &buffer);
@ -447,6 +450,8 @@ int dptx_set_trainingstart(struct mtk_dp *mtk_dp)
else
return DPTX_TRANING_FAIL;
} else {
printk(BIOS_INFO, "%s done after %lld msecs\n", __func__,
stopwatch_duration_msecs(&sw));
return DPTX_PASS;
}
} while (--limit > 0);

6
src/soc/mediatek/common/dp/dptx_v2.c
View file

@ -11,6 +11,7 @@
#include <soc/dptx.h>
#include <soc/dptx_hal.h>
#include <soc/dptx_reg.h>
#include <timer.h>
static void mtk_edp_pattern(struct mtk_dp *mtk_dp, u8 lane_count, u8 pattern)
{
@ -255,7 +256,9 @@ int dptx_set_trainingstart(struct mtk_dp *mtk_dp)
u8 train_limit;
u8 max_linkrate;
int ret;
struct stopwatch sw;
stopwatch_init(&sw);
buffer = 0x1;
dptx_auxwrite_dpcd(mtk_dp, DP_AUX_NATIVE_WRITE, DPCD_00600, 0x1, &buffer);
@ -349,7 +352,8 @@ int dptx_set_trainingstart(struct mtk_dp *mtk_dp)
dptx_hal_setscramble(mtk_dp, true);
dptx_hal_set_ef_mode(mtk_dp, ENABLE_DPTX_EF_MODE);
printk(BIOS_INFO, "%s: done\n", __func__);
printk(BIOS_INFO, "%s done after %lld msecs\n", __func__,
stopwatch_duration_msecs(&sw));
return DPTX_PASS;
}