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mb/google/rex/var/deku: Set FORCE_PWR pin high by default

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The Intel Hayden Bridge Re-timer drives I2C SDA low unexpectedly
which breaks the I2C communication between EC and TCPC and causes
multiple USB-C issues. This patch sets HBR FORCE_PWR pin high by
default to prevent the HBR from entering low power state to work
around the I2C issue.

BUG=b:386019934,b:380947618
TEST=Verify basic USB-C functions on Deku

Change-Id: I6eae8ad4ae1b22446b903fad276a3fbcd57ca865
Signed-off-by: Derek Huang <derekhuang@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Derek Huang 2025-03-14 05:09:17 +00:00 • committed by Matt DeVillier
commit a4e771a836
1 changed files with 2 additions and 1 deletions
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src/mainboard/google/rex/variants/deku/gpio.c
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@ -86,7 +86,8 @@ static const struct pad_config gpio_table[] = {
/* GPP_B21 : net NC is not present in the given design */
PAD_NC(GPP_B21, NONE),
/* GPP_B22 : [] ==> USB_C_FORCE_PWR */
PAD_CFG_GPO(GPP_B22, 0, DEEP),
/* TODO: Set back to 0 when the Hayden Bridge Re-timer issue is fixed (b/386019934) */
PAD_CFG_GPO(GPP_B22, 1, DEEP),
/* GPP_B23 : net NC is not present in the given design */
PAD_NC(GPP_B23, NONE),