From a4e771a836c4de425f4a67df6fbe7595b88fba75 Mon Sep 17 00:00:00 2001 From: Derek Huang Date: Fri, 14 Mar 2025 05:09:17 +0000 Subject: [PATCH] mb/google/rex/var/deku: Set FORCE_PWR pin high by default The Intel Hayden Bridge Re-timer drives I2C SDA low unexpectedly which breaks the I2C communication between EC and TCPC and causes multiple USB-C issues. This patch sets HBR FORCE_PWR pin high by default to prevent the HBR from entering low power state to work around the I2C issue. BUG=b:386019934,b:380947618 TEST=Verify basic USB-C functions on Deku Change-Id: I6eae8ad4ae1b22446b903fad276a3fbcd57ca865 Signed-off-by: Derek Huang Reviewed-on: https://review.coreboot.org/c/coreboot/+/86852 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Paul Menzel --- src/mainboard/google/rex/variants/deku/gpio.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/rex/variants/deku/gpio.c b/src/mainboard/google/rex/variants/deku/gpio.c index 55464dd468..77e7cecdff 100644 --- a/src/mainboard/google/rex/variants/deku/gpio.c +++ b/src/mainboard/google/rex/variants/deku/gpio.c @@ -86,7 +86,8 @@ static const struct pad_config gpio_table[] = { /* GPP_B21 : net NC is not present in the given design */ PAD_NC(GPP_B21, NONE), /* GPP_B22 : [] ==> USB_C_FORCE_PWR */ - PAD_CFG_GPO(GPP_B22, 0, DEEP), + /* TODO: Set back to 0 when the Hayden Bridge Re-timer issue is fixed (b/386019934) */ + PAD_CFG_GPO(GPP_B22, 1, DEEP), /* GPP_B23 : net NC is not present in the given design */ PAD_NC(GPP_B23, NONE),