soc/qualcomm/common: Map AOP CMD-DB region as uncached region in MMU

Add support to map AOP CMD-DB region as uncached region in MMU. The
reason for this change is that the CMD-DB region is configured as
read-only region and any write to this region will be treated as
fatal. Mapping it as cacheable can lead to cache-line writebacks,
causing invalid accesses and device crashes.

Test=1. Create an image.serial.bin and ensure it boots on X1P42100.
MMU Table dump from Trace32:
'M:0000000081C60000--0000000081C7FFFF|    AM:0000000081C60000--0000000081C7FFFF| s  |  | 00001000| read/write access        exec        | yes| inn| non-cacheable                     |  1| no | \\ramstage\Global\_dram_aop_cmd_db'

Change-Id: I296b505f670f3be28eb998fdac8164a85bf757b0
Signed-off-by: Swathi Tamilselvan <tswathi@qualcomm.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90464
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/qualcomm/common/include/soc/symbols_common.h

@@ -11,6 +11,8 @@ DECLARE_REGION(ddr_information);
 DECLARE_REGION(ssram)
 DECLARE_REGION(bsram)
 DECLARE_REGION(dram_aop)
+DECLARE_OPTIONAL_REGION(dram_aop_cmd_db)
+DECLARE_REGION(dram_aop_config)
 DECLARE_REGION(dram_soc)
 DECLARE_REGION(dcb)
 DECLARE_REGION(dtb)

src/soc/qualcomm/common/mmu.c

@@ -76,4 +76,7 @@ void qc_mmu_dram_config_post_dram_init(size_t ddr_size)
 	if (_preram_dma_coherent != _postram_dma_coherent)
 		mmu_config_range((void *)_postram_dma_coherent, REGION_SIZE(postram_dma_coherent),
 							UNCACHED_RAM);
+
+	if (REGION_SIZE(dram_aop_cmd_db) != 0)
+		mmu_config_range((void *)_dram_aop_cmd_db, REGION_SIZE(dram_aop_cmd_db), UNCACHED_RAM);
 }