soc/qualcomm/x1p42100/usb: Fix code comments and debug messages
Fix code comments and debug messages. BUG=none TEST=Build Google/Quenbi. Debug logs: ``` [INFO ] Setting up USB HOST0 controller. [DEBUG] USB HS PHY initialized for index 0 [DEBUG] USB HS PHY initialized for index 1 [DEBUG] QMP PHY MP0 init [DEBUG] QMP PHY MP0 initialized and locked in 1674us [DEBUG] QMP PHY MP1 init [DEBUG] QMP PHY MP1 initialized and locked in 1674us [SPEW ] Configure USB in Host mode [INFO ] DWC3 and PHY setup finished ``` Change-Id: If606a247657ffe39203101a5ff38439348deba29 Signed-off-by: Kapil Porwal <kapilporwal@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/89188 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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1 changed files with 7 additions and 4 deletions
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@ -463,7 +463,7 @@ static bool ss_qmp_phy_init_common(const struct ss_usb_phy_reg *ss_phy_reg)
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udelay(100);
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/*
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* Wait for PHY initialization to be done
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* PCS_STATUS: wait for 1ms for PHY STATUS;
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* PCS_STATUS: wait for 10ms for PHY STATUS;
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* SW can continuously check for PHYSTATUS = 1.b0.
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*/
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long lock_us = wait_us(10000,
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@ -471,7 +471,8 @@ static bool ss_qmp_phy_init_common(const struct ss_usb_phy_reg *ss_phy_reg)
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USB3_PCS_PHYSTATUS));
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if (!lock_us) {
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ret = false;
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printk(BIOS_ERR, "QMP PHY %s PLL LOCK fails:\n", ss_phy_reg->name);
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printk(BIOS_ERR, "QMP PHY %s PLL LOCK failed after %ldus\n",
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ss_phy_reg->name, lock_us);
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} else {
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printk(BIOS_DEBUG, "QMP PHY %s initialized and locked in %ldus\n",
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ss_phy_reg->name, lock_us);
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@ -479,8 +480,10 @@ static bool ss_qmp_phy_init_common(const struct ss_usb_phy_reg *ss_phy_reg)
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return ret;
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}
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/* Unified ss_qmp_phy_init function to initialize a specific PHY instance
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Pass 0 for MP0, or 1 for MP1. */
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/*
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* Unified ss_qmp_phy_init function to initialize a specific PHY
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* instance. Pass 0 for MP0 and 1 for MP1.
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*/
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bool ss_qmp_phy_init(u32 phy_idx)
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{
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bool ret = true;
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