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mb/*/gpio: Remove local macros for bidirectional GPIO

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These definitions are no longer necessary, since macros from
intel/common are used in the configuration [1].

[1] CB:42914

Change-Id: I0a6061aa562ea98c1bcffd86adac9aea28d7766b
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84336
Reviewed-by: coreboot org <coreboot.org@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maxim Polyakov 2024-09-12 12:01:15 +03:00 • committed by Matt DeVillier
commit a1238333d1
6 changed files with 0 additions and 69 deletions
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12
src/mainboard/51nb/x210/gpio.h
View file

@ -5,18 +5,6 @@
#include <soc/gpio.h>
/*
* Bidirectional GPIO port when both RX and TX buffer is enabled
* todo: move this macros to src/soc/intel/common/block/include/intelblocks/gpio_defs.h
*/
#ifndef PAD_CFG_GPIO_BIDIRECT
#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(NO_DISABLE) | val, \
PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
#endif
#ifndef __ACPI__
/* Pad configuration in ramstage. */

8
src/mainboard/aoostar/wtr_r1/gpio.h
View file

@ -5,14 +5,6 @@
#include <gpio.h>
#ifndef PAD_CFG_GPIO_BIDIRECT
#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(NO_DISABLE) | val, \
PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
#endif
/* Pad configuration was generated automatically using intelp2m utility */
static const struct pad_config gpio_table[] = {

21
src/mainboard/kontron/mal10/include/carrier/gpio.h
View file

@ -5,27 +5,6 @@
#include <gpio.h>
/*
* Bidirectional GPIO port when both RX and TX buffer is enabled
* TODO: move this macros to src/soc/intel/common/block/include/intelblocks/gpio_defs.h
*/
#ifndef PAD_CFG_GPIO_BIDIRECT_IOS
#define PAD_CFG_GPIO_BIDIRECT_IOS(pad, val, pull, rst, trig, iosstate, iosterm, own) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(NO_DISABLE) | val, \
PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own) | \
PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
#endif
#ifndef PAD_CFG_GPIO_BIDIRECT
#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(NO_DISABLE) | val, \
PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
#endif
void carrier_gpio_configure(void);
#endif /* CARRIER_GPIO_H */

8
src/mainboard/protectli/vault_adl_p/gpio.c
View file

@ -4,14 +4,6 @@
#include "gpio.h"
#ifndef PAD_CFG_GPIO_BIDIRECT
#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(NO_DISABLE) | val, \
PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
#endif
/* Pad configuration was generated automatically using intelp2m utility */
static const struct pad_config gpio_table[] = {

8
src/mainboard/protectli/vault_ehl/gpio.h
View file

@ -5,14 +5,6 @@
#include <gpio.h>
#ifndef PAD_CFG_GPIO_BIDIRECT
#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(NO_DISABLE) | val, \
PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
#endif
/* PAD configuration was generated automatically using intelp2m utility */
static const struct pad_config gpio_table[] = {
/* ------- GPIO Community 0 ------- */

12
src/mainboard/razer/blade_stealth_kbl/variants/h2u/include/variant/gpio.h
View file

@ -5,18 +5,6 @@
#include <soc/gpio.h>
/*
* Bidirectional GPIO port when both RX and TX buffer is enabled
* todo: move this macros to src/soc/intel/common/block/include/intelblocks/gpio_defs.h
*/
#ifndef PAD_CFG_GPIO_BIDIRECT
#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(NO_DISABLE) | val, \
PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
#endif
#ifndef __ACPI__
/* Pad configuration in ramstage. */