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soc/intel/common/gpio_defs: Add macros for bidirectional pad

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Adds new macros to configure the pad in bidirectional mode when both
(Tx/Rx) buffers are enabled in the configuration register DW0. This
corresponds to FSP's < GpioDirInOut > parameter for port direction
(for example see config for SOUTH_GROUP0_DFX_SPARE2 pad in
src/mainboard/intel/harcuvar/gpio.h).

This macro is used in the pad configuration for some boards:
 CB:43456 - mb/intel/cedarisland_crb;
 CB:39133 - mb/kontron/mal10;
 CB:43410 - mb/51nb/x210;
 CB:43411 - mb/razer/blade_stealth_kbl.

Change-Id: I7b65f4da7616f2eefcd33a728d4d3ae5a79b014e
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42914
Reviewed-by: coreboot org <coreboot.org@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maxim Polyakov 2020-08-09 01:30:47 +03:00 • committed by Matt DeVillier
commit 5852854cdf
1 changed files with 14 additions and 0 deletions
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14
src/soc/intel/common/block/include/intelblocks/gpio_defs.h
View file

@ -395,6 +395,20 @@
#define PAD_CFG_GPI_INT_LOCK_SWAPPED(pad, pull, trig, lock_action) \
PAD_CFG_GPI_TRIG_OWN_LOCK_SWAPPED(pad, pull, PWROK, trig, DRIVER, lock_action)
/* Bidirectional GPIO port when both RX and TX buffer is enabled */
#define PAD_CFG_GPIO_BIDIRECT_IOS(pad, val, pull, rst, trig, iosstate, iosterm, own) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(NO_DISABLE) | val, \
PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own) | \
PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \
_PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(NO_DISABLE) | val, \
PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own))
/*
* No Connect configuration for unconnected or unused pad.
* Both TX and RX are disabled. RX disabling is done to avoid unnecessary