drivers/spi: Refactor 4-byte addressing mode handling in SPI flash
This commit refactors the logic for entering and exiting 4-byte addressing mode in the SPI flash driver. Changes include: - Renaming SPI_FLASH_EXIT_4BYTE_STAGE to SPI_FIRST_STAGE to better reflect its broader applicability to initial boot stages. - Applying SPI_FIRST_STAGE to both the force 4-byte address mode and exit 4-byte address mode configurations, ensuring these operations are only attempted during the appropriate early boot phases. - Renaming CMD_FORCE_4BYTE_ADDR_MODE to CMD_ENTER_4BYTE_ADDR_MODE for consistency and clearer semantics, as 0xb7 is typically used to enter this mode. BUG=b:417900125 TEST=Able to build google/bluey. Change-Id: I79e2c7bbd222fd0d76072860bdf3feba7e7d587d Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88203 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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2 changed files with 6 additions and 6 deletions
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@ -18,7 +18,7 @@
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#define ADDR_MOD 0
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#endif
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#define SPI_FLASH_EXIT_4BYTE_STAGE \
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#define SPI_FIRST_STAGE \
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(ENV_INITIAL_STAGE || CONFIG(BOOT_DEVICE_MEMORY_MAPPED))
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static void spi_flash_addr(u32 addr, u8 *cmd)
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@ -564,12 +564,12 @@ int spi_flash_probe(unsigned int bus, unsigned int cs, struct spi_flash *flash)
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CONFIG_ROM_SIZE);
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}
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if (CONFIG(SPI_FLASH_FORCE_4_BYTE_ADDR_MODE)) {
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printk(BIOS_DEBUG, "SF: Force 4-byte addressing mode\n");
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spi_flash_cmd(&flash->spi, CMD_FORCE_4BYTE_ADDR_MODE, NULL, 0);
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if (CONFIG(SPI_FLASH_FORCE_4_BYTE_ADDR_MODE) && SPI_FIRST_STAGE) {
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printk(BIOS_DEBUG, "SF: Entering 4-byte addressing mode\n");
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spi_flash_cmd(&flash->spi, CMD_ENTER_4BYTE_ADDR_MODE, NULL, 0);
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}
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if (CONFIG(SPI_FLASH_EXIT_4_BYTE_ADDR_MODE) && SPI_FLASH_EXIT_4BYTE_STAGE) {
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if (CONFIG(SPI_FLASH_EXIT_4_BYTE_ADDR_MODE) && SPI_FIRST_STAGE) {
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printk(BIOS_DEBUG, "SF: Exiting 4-byte addressing mode\n");
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spi_flash_cmd(&flash->spi, CMD_EXIT_4BYTE_ADDR_MODE, NULL, 0);
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}
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@ -22,7 +22,7 @@
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#define CMD_READ_STATUS 0x05
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#define CMD_WRITE_ENABLE 0x06
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#define CMD_FORCE_4BYTE_ADDR_MODE 0xb7
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#define CMD_ENTER_4BYTE_ADDR_MODE 0xb7
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#define CMD_BLOCK_ERASE 0xD8
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