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mb/google/fatcat/var/fatcat Align I2S and DMIC pad configuration

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This commit aligns the I2S and DMIC pad configurations in `fw_config.c`
and `gpio.c` for the Fatcat mainboard.

The changes include:
- Reordering I2S1 pad configurations in `fw_config.c` to match their
  intended functions (TXD, RXD, SCLK, SFRM).
- Adding I2S2 pad configurations (SCLK, SFRM, TXD, RXD) to
  `fw_config.c`.
- Removing duplicate DMIC_CLK and DMIC_DATA pad configurations from
  `fw_config.c`.
- Moving the CODEC_EN pad configuration from `fp_disable_pads` and
  `fp_enable_pads` in `fw_config.c` to `gpio_table` in `gpio.c`, and
  changing its power state to DEEP (as applicable)
- Updating GPP_F17 to CODEC_INT_N with GPI configuration in `gpio.c`.

These adjustments ensure correct and consistent pad assignments
for audio functionality.

TEST=Able to hear devbeep while booting google/fatcat.

Change-Id: I477ffeef113e2f3a4d0e759b9416f9e7e5427ec3
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
This commit is contained in:
Subrata Banik 2025-06-24 11:28:00 +05:30
commit 30e7e604fb
2 changed files with 20 additions and 19 deletions
Download patch file Download diff file Expand all files Collapse all files

31
src/mainboard/google/fatcat/variants/fatcat/fw_config.c
View file

@ -22,24 +22,27 @@ static const struct pad_config i2s_enable_pads[] = {
PAD_CFG_NF(GPP_D12, NONE, DEEP, NF2),
/* I2S0_RXD_HDR */
PAD_CFG_NF(GPP_D13, NONE, DEEP, NF2),
/* I2S1_SCLK_HDR */
PAD_CFG_NF(GPP_S00, NONE, DEEP, NF6),
/* I2S1_SFRM_HDR */
PAD_CFG_NF(GPP_S01, NONE, DEEP, NF6),
/* I2S1_TXD_HDR */
PAD_CFG_NF(GPP_S02, NONE, DEEP, NF6),
PAD_CFG_NF(GPP_S00, NONE, DEEP, NF6),
/* I2S1_RXD_HDR */
PAD_CFG_NF(GPP_S01, NONE, DEEP, NF6),
/* I2S1_SCLK_HDR */
PAD_CFG_NF(GPP_S02, NONE, DEEP, NF6),
/* I2S1_SFRM_HDR */
PAD_CFG_NF(GPP_S03, NONE, DEEP, NF6),
/* I2S2_SCLK_HDR */
PAD_CFG_NF(GPP_S04, NONE, DEEP, NF6),
/* I2S2_SFRM_HDR */
PAD_CFG_NF(GPP_S05, NONE, DEEP, NF6),
/* I2S2_TXD_HDR */
PAD_CFG_NF(GPP_S06, NONE, DEEP, NF6),
/* I2S2_RXD_HDR */
PAD_CFG_NF(GPP_S07, NONE, DEEP, NF6),
/* DMIC_CLK */
PAD_CFG_NF(GPP_D16, NONE, DEEP, NF3),
/* DMIC_DATA */
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF3),
/* DMIC_CLK */
PAD_CFG_NF(GPP_S04, NONE, DEEP, NF5),
/* DMIC_DATA */
PAD_CFG_NF(GPP_S05, NONE, DEEP, NF5),
};
static const struct pad_config hda_enable_pads[] = {
@ -507,12 +510,6 @@ static const struct pad_config fp_disable_pads[] = {
/* GPP_D01: MOD_TCSS1_TYP_A_VBUS_EN */
PAD_CFG_GPO(GPP_D01, 1, DEEP),
PAD_NC(GPP_E17, NONE),
/* FIXME: b/390031369
* use dedicated GPIO PIN for codec enable
* when FPS is enabled.
*/
/* GPP_E19: CODEC_EN */
PAD_CFG_GPO(GPP_E19, 1, PLTRST),
PAD_NC(GPP_E20, NONE),
PAD_NC(GPP_F14, NONE),
PAD_NC(GPP_F15, NONE),
@ -526,8 +523,6 @@ static const struct pad_config fp_enable_pads[] = {
PAD_CFG_GPI_IRQ_WAKE(GPP_D01, NONE, PWROK, LEVEL, INVERT),
/* GPP_E17: GSPI0A_CS0 */
PAD_CFG_NF(GPP_E17, NONE, DEEP, NF5),
/* GPP_E19: FPMCU_PWREN */
PAD_CFG_GPO(GPP_E19, 1, DEEP),
/* GPP_E20: FPMCU_FW_UPDATE */
PAD_CFG_GPO_LOCK(GPP_E20, 0, LOCK_CONFIG),
/* GPP_F14: GPSI0A_MOSI */

10
src/mainboard/google/fatcat/variants/fatcat/gpio.c
View file

@ -224,6 +224,12 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_E16, 1, DEEP),
/* GPP_E18: THC0_SPI1_INT_N_TCH_PNL1 */
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF3),
/* FIXME: b/390031369
* use dedicated GPIO PIN for codec enable
* when FPS is enabled.
*/
/* GPP_E19: CODEC_EN */
PAD_CFG_GPO(GPP_E19, 1, DEEP),
/* GPP_E21: I2C_PMC_PD_INT_N */
PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
/* GPP_E22: THC0_SPI1_DSYNC */
@ -263,8 +269,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_F12, NONE, DEEP, NF8),
/* GPP_F13: THC_I2C1_SDA_TCH_PAD */
PAD_CFG_NF(GPP_F13, NONE, DEEP, NF8),
/* GPP_F17: Not used */
PAD_CFG_GPI_INT(GPP_F17, NONE, PLTRST, EDGE_BOTH),
/* GPP_F17: CODEC_INT_N */
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
/* GPP_F18: TCH_PAD_INT_N */
/* NOTE: require rework to switch from GPP_A13 to GPP_F18 */
PAD_CFG_GPI_APIC(GPP_F18, NONE, PLTRST, LEVEL, INVERT),