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Fix a bunch of Doxygen warnings in v3 (trivial).

Browse source 
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@951 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Uwe Hermann 2008-10-23 18:55:01 +00:00
commit 9b90a6f22b
13 changed files with 37 additions and 33 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/x86/amd/model_fxx/init_cpus.c
View file

@ -47,7 +47,7 @@
* core_range = 0 : all cores
* core range = 1 : core 0 only
* core range = 2 : cores other than core0
* @param process pointer to the function to run
* @param process_ap pointer to the function to run
* @param gp general purpose argument to be passed as a parameter to the function
*/
void for_each_ap(unsigned bsp_apicid, unsigned core_range,

5
arch/x86/pci_ops_conf1.c
View file

@ -105,8 +105,9 @@ void pci_conf1_write_config32(u32 bdf, int where, u32 value)
* We should consider a breadth-first search. The reason is that in almost all cases,
* the device you want in the coreboot context is on bus 0.
*
* @param vid vendor id
* @param did device ide
* @param bus Bus
* @param vid vendor ID
* @param did device ID
* @param busdevfn pointer to a u32 in which the slot is returned.
* @return 1 if found, 0 otherwise
*/

4
arch/x86/stage1.c
View file

@ -259,7 +259,7 @@ void __attribute__((stdcall)) stage1_phase1(u32 bist, u32 init_detected)
* TODO: Some parts of the list above are not yet done, so the code will not
* yet work on C7.
*/
void stage1_phase2()
void stage1_phase2(void)
{
#ifdef CONFIG_CONSOLE_BUFFER
/* Move the printk buffer to PRINTK_BUF_ADDR_RAM */
@ -276,7 +276,7 @@ void stage1_phase2()
* This function is the second part of the former stage1_main() after
* switching the stack and disabling CAR.
*/
void __attribute__((stdcall)) stage1_phase3()
void __attribute__((stdcall)) stage1_phase3(void)
{
void *entry;
int ret;

10
device/device.c
View file

@ -108,9 +108,9 @@ void default_device_constructor(struct device *dev, struct device_operations *op
}
/**
* Given a path, locate the device_operations for it from all_device_operations..
* Given a path, locate the device_operations for it from all_device_operations.
*
* @param path Path to the device to be created.
* @param id TODO
* @return Pointer to the ops or 0, if none found.
* @see device_path
*/
@ -173,7 +173,6 @@ void dev_init(void)
* then no constructor is run.
*
* @param dev Pointer to the newly created device structure.
* @param path Path to the device to be created.
* @see device_path
*/
void constructor(struct device *dev)
@ -198,6 +197,8 @@ void constructor(struct device *dev)
dev_id_string(&dev->id));
}
spin_define(dev_lock);
/**
* Allocate a new device structure and attach it to the device tree as a
* child of the parent bus.
@ -208,9 +209,6 @@ void constructor(struct device *dev)
* @return Pointer to the newly created device structure.
* @see device_path
*/
spin_define(dev_lock);
struct device *alloc_dev(struct bus *parent, struct device_path *path,
struct device_id *devid)
{

6
device/device_util.c
View file

@ -32,7 +32,7 @@
/**
* See if a device structure exists for path.
*
* @param bus The bus to find the device on.
* @param parent The bus to find the device on.
* @param path The relative path from the bus to the appropriate device.
* @return Pointer to a device structure for the device on bus at path
* or 0/NULL if no device is found.
@ -51,8 +51,9 @@ struct device *find_dev_path(struct bus *parent, struct device_path *path)
/**
* See if a device structure already exists and if not allocate it.
*
* @param bus The bus to find the device on.
* @param parent The bus to find the device on (TODO: comment correct?).
* @param path The relative path from the bus to the appropriate device.
* @param device_id TODO
* @return Pointer to a device structure for the device on bus at path.
*/
struct device *alloc_find_dev(struct bus *parent, struct device_path *path,
@ -616,6 +617,7 @@ const char *resource_type(struct resource *resource)
*
* @param dev The device the stored resource lives on.
* @param resource The resource that was just stored.
* @param comment TODO
*/
void report_resource_stored(struct device *dev, struct resource *resource,
const char *comment)

4
device/hypertransport.c
View file

@ -608,7 +608,9 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int min_devfn,
*
* TODO: This comment in copy+pasted from elsewhere and probably incorrect.
*
* @param dev Pointer to the bridge device.
* @param bus TODO
* @param min_devfn TODO
* @param max_devfn TODO
* @param max The highest bus number assigned up to now.
* @return The maximum bus number found, after scanning all subordinate buses.
*/

4
device/pnp_raw.c
View file

@ -40,7 +40,7 @@ void rawpnp_enter_ext_func_mode(u16 port)
/**
* Exit the PNP extended function mode (a.k.a. "MB PnP" or "config" mode).
*
* @param dev The device IO port.
* @param port The device I/O port.
*/
void rawpnp_exit_ext_func_mode(u16 port)
{
@ -89,7 +89,7 @@ u8 rawpnp_read_config(u16 port, u8 reg)
* PNP has up to 16 logical devices. They are selected by writing the
* logical device number (LDN) to register 0x07.
*
* @param dev The device I/O port.
* @param port The device I/O port.
* @param ldn The logical device (number) which should be selected.
*/
void rawpnp_set_logical_device(u16 port, u8 ldn)

2
lib/lar.c
View file

@ -43,7 +43,7 @@ static const char * const algo_name[] = {
/**
* run_address is passed the address of a function taking no parameters and
* jumps to it, returning the result.
* @param v the address to call as a function.
* @param f the address to call as a function.
* returns value returned by the function.
*/

7
mainboard/amd/serengeti/initram.c
View file

@ -99,8 +99,7 @@ u8 spd_read_byte(u16 device, u8 address)
/**
* main for initram for the AMD Serengeti
* @param init_detected Used to indicate that we have been started via init
* @returns 0 on success
* init_detected Used to indicate that we have been started via init
* The purpose of this code is to not only get ram going, but get any other cpus/cores going.
* The two activities are very tightly connected and not really seperable.
* The BSP (boot strap processor) Core 0 (BSC) is responsible for all training or all sockets. Note that
@ -110,12 +109,12 @@ u8 spd_read_byte(u16 device, u8 address)
* The bringup proceeds in several sections. The cool part is that this code is run by all CPUs, and
* control flow is managed by seeing which CPU we are -- BSP or AP?
*
*/
/*
* init_detected is used to determine if we did a soft reset as required by a reprogramming of the
* hypertransport links. If we did this kind of reset, bit 11 will be set in the MTRRdefType_MSR MSR.
* That may seem crazy, but there are not lots of places to hide a bit when the CPU does a reset.
* This value is picked up in assembly, or it should be.
*
* @return 0 on success
*/
int main(void)
{

1
northbridge/amd/geodelx/raminit.c
View file

@ -61,7 +61,6 @@ const static char msrnames[][20] = {
/**
* Dump key MSR values for RAM init. You can call this function and then use it to
* compare to a factory BIOS setting.
* @param level printk level
*/
void dumplxmsrs(void)
{

2
northbridge/amd/k8/raminit.c
View file

@ -2942,7 +2942,7 @@ void fill_mem_ctrl(int controllers, struct mem_controller *ctrl_a, const u16 *sp
* we break it out by northbridge now to accomodate the different peculiarities of
* different chipsets.
*@param controllers Number of controllers
*@param ctlr array of memory controllers
*@param ctrl array of memory controllers
*@param sysinfo pointer to sysinfo struct.
*/
void sdram_initialize(int controllers, const struct mem_controller *ctrl, struct sys_info *sysinfo)

3
southbridge/via/vt8237/stage1.c
View file

@ -98,6 +98,7 @@ static void smbus_wait_until_ready(u16 smbus_io_base)
*
* @param dimm The address location of the DIMM on the SMBus.
* @param offset The offset the data is located at.
* @param smbus_io_base The SMBus I/O base, usually 0x400.
*/
u8 smbus_read_byte(u16 dimm, u8 offset, u16 smbus_io_base)
{
@ -138,7 +139,7 @@ u8 smbus_read_byte(u16 dimm, u8 offset, u16 smbus_io_base)
/**
* Enable the smbus on vt8237-based systems
*
* @param smbus_io_base: The SMBus I/O base, usually 0x400
* @param smbus_io_base The SMBus I/O base, usually 0x400.
*/
void enable_smbus(u16 smbus_io_base)
{

20
util/lar/stream.c
View file

@ -329,10 +329,11 @@ int lar_add_bootblock(struct lar *lar, const char *bootblock)
}
/**
* mmap() the LAR archive
* @param lar The LAR archive information to map
* @param u32 size Size of the mapped region
* @return 0 on success, or -1 on failure
* mmap() the LAR archive.
*
* @param lar The LAR archive information to map.
* @param size Size of the mapped region.
* @return 0 on success, or -1 on failure.
*/
static int _map_lar(struct lar *lar, u32 size)
{
@ -439,7 +440,7 @@ err:
/**
* Open an existing LAR archive
* @param The archive filename to open
* @param archive The archive filename to open
* @return A LAR archive structure for the opened archive
*/
struct lar * lar_open_archive(const char *archive)
@ -802,9 +803,9 @@ char *mapfile(char *filename, u32 *size)
/**
* Given a name, return the size of the header for that name.
*
* @param name header name
* @param pathname header name
* @param new_pathlen pointer to the (possibly truncated) pathlen
* @return header size
* @return header size
*/
int header_len(char *pathname, int *new_pathlen)
{
@ -823,7 +824,8 @@ int header_len(char *pathname, int *new_pathlen)
/**
* Return the amount of space left in a lar, given a name for the entry
* @param Name of the entry
* @param lar TODO
* @param name Name of the entry
* @return Maximum possible size for the entry
*/
int maxsize(struct lar *lar, char *name)
@ -937,7 +939,7 @@ int lar_add_entry(struct lar *lar, char *pathname, void *data,
/**
* Add a new file to the LAR archive
* @param lar The LAR archive to write into
* @param name The name of the file to add
* @param file The name of the file to add (TODO: Fix comment)
* @return 0 on success, or -1 on failure
*/
int lar_add_file(struct lar *lar, struct file* file)