mb/google/fatcat/var/kinmen: Add overridetree
Add override devicetree per schematic_20250520_v25. BUG=b:409148565 TEST=emerge-fatcat coreboot Change-Id: I05a89047331731321eae386076c6e4c2473d1a82 Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87768 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Ivy Jian
Matt DeVillier
parent
bbcb222f0b
commit
98782a59e9
1 changed files with 286 additions and 0 deletions
|
|
@ -1,8 +1,294 @@
|
|||
chip soc/intel/pantherlake
|
||||
|
||||
# The initial version temporarily uses the PTL-H,
|
||||
# but the thermal design is based on the PTL-U.
|
||||
# Apply PTL-U's thermal settings here to avoid thermal issues.
|
||||
register "power_limits_config[PTL_H_1_CORE]" = "{
|
||||
.tdp_pl1_override = 15,
|
||||
.tdp_pl2_override = 55,
|
||||
.tdp_pl4 = 152,
|
||||
}"
|
||||
|
||||
register "power_limits_config[PTL_H_2_CORE]" = "{
|
||||
.tdp_pl1_override = 15,
|
||||
.tdp_pl2_override = 55,
|
||||
.tdp_pl4 = 152,
|
||||
}"
|
||||
|
||||
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
|
||||
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
|
||||
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB_CAMERA
|
||||
register "usb2_ports[4]" = "USB2_PORT_MID(OC0)" # Type-A Port A0
|
||||
register "usb2_ports[5]" = "USB2_PORT_MID(OC1)" # Type-A Port A1
|
||||
|
||||
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # USB3.2 Type-A Port A0
|
||||
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # USB3.2 Type-A Port A1
|
||||
|
||||
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" # USB3_C0
|
||||
register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC_SKIP)" # USB3_C1
|
||||
|
||||
register "tcss_cap_policy[0]" = "TCSS_TYPE_C_PORT_FULL_FUN"
|
||||
register "tcss_cap_policy[2]" = "TCSS_TYPE_C_PORT_FULL_FUN"
|
||||
register "tcss_cap_policy[3]" = "TCSS_TYPE_C_PORT_FULL_FUN"
|
||||
|
||||
# Enable EDP in PortA
|
||||
register "ddi_port_A_config" = "1"
|
||||
register "ddi_ports_config" = "{
|
||||
[DDI_PORT_A] = DDI_ENABLE_HPD,
|
||||
}"
|
||||
|
||||
# Enable CNVi Wi-Fi and Bluetooth
|
||||
register "cnvi_wifi_core" = "true"
|
||||
register "cnvi_bt_core" = "true"
|
||||
|
||||
register "serial_io_i2c_mode" = "{
|
||||
[PchSerialIoIndexI2C0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexI2C3] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C4] = PchSerialIoPci,
|
||||
[PchSerialIoIndexI2C5] = PchSerialIoPci,
|
||||
}"
|
||||
|
||||
register "serial_io_gspi_mode" = "{
|
||||
[PchSerialIoIndexGSPI0] = PchSerialIoPci,
|
||||
[PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
|
||||
[PchSerialIoIndexGSPI0A] = PchSerialIoDisabled,
|
||||
}"
|
||||
|
||||
# Intel Common SoC Config
|
||||
#+-------------------+---------------------------+
|
||||
#| Field | Value |
|
||||
#+-------------------+---------------------------+
|
||||
#| I2C3 | TPM(cr50) |
|
||||
#| I2C4 | Touchpad |
|
||||
#| I2C5 | Touchscreen |
|
||||
#+-------------------+---------------------------+
|
||||
register "common_soc_config" = "{
|
||||
.logo_valignment = FW_SPLASH_VALIGNMENT_MIDDLE,
|
||||
.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
|
||||
.i2c[3] = {
|
||||
.early_init = 1,
|
||||
.speed = I2C_SPEED_FAST,
|
||||
},
|
||||
.i2c[4] = {
|
||||
.speed = I2C_SPEED_FAST,
|
||||
},
|
||||
.i2c[5] = {
|
||||
.speed = I2C_SPEED_FAST,
|
||||
},
|
||||
}"
|
||||
|
||||
device domain 0 on
|
||||
device ref igpu on
|
||||
chip drivers/gfx/generic
|
||||
register "device_count" = "4"
|
||||
# DDIA for eDP
|
||||
register "device[0].name" = ""LCD0""
|
||||
register "device[0].type" = "panel"
|
||||
# HDMI
|
||||
# If HDMI is not enumerated in the kernel, then no GFX device should be added for DDIB
|
||||
register "device[1].name" = ""DD01""
|
||||
# TCP0 (DP-1) for port C0
|
||||
register "device[2].name" = ""DD02""
|
||||
register "device[2].use_pld" = "true"
|
||||
register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
|
||||
# TCP2 (DP-2) for port C1
|
||||
register "device[3].name" = ""DD03""
|
||||
register "device[3].use_pld" = "true"
|
||||
register "device[3].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
|
||||
device generic 0 on end
|
||||
end
|
||||
end
|
||||
|
||||
device ref iaa off end
|
||||
device ref tbt_pcie_rp0 on end
|
||||
device ref tbt_pcie_rp2 on end
|
||||
device ref tbt_pcie_rp3 on end
|
||||
device ref tcss_xhci on
|
||||
chip drivers/usb/acpi
|
||||
device ref tcss_root_hub on
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB3 Type-C Port C0""
|
||||
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
|
||||
register "group" = "ACPI_PLD_GROUP(1, 2)"
|
||||
device ref tcss_usb3_port0 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB3 Type-C Port C1""
|
||||
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
|
||||
register "group" = "ACPI_PLD_GROUP(2, 2)"
|
||||
device ref tcss_usb3_port2 on end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
device ref tcss_dma0 on
|
||||
chip drivers/intel/usb4/retimer
|
||||
register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
|
||||
use tcss_usb3_port0 as dfp[0].typec_port
|
||||
device generic 0 on end
|
||||
end
|
||||
end
|
||||
device ref tcss_dma1 on
|
||||
chip drivers/intel/usb4/retimer
|
||||
register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
|
||||
use tcss_usb3_port2 as dfp[0].typec_port
|
||||
device generic 0 on end
|
||||
end
|
||||
end
|
||||
|
||||
# ToDo: enable ISH b/415605634
|
||||
|
||||
device ref xhci on
|
||||
chip drivers/usb/acpi
|
||||
device ref xhci_root_hub on
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Type-C Port C0""
|
||||
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
|
||||
register "group" = "ACPI_PLD_GROUP(1, 1)"
|
||||
device ref usb2_port1 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Type-C Port C1""
|
||||
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
|
||||
register "group" = "ACPI_PLD_GROUP(2, 1)"
|
||||
device ref usb2_port2 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Camera""
|
||||
register "type" = "UPC_TYPE_INTERNAL"
|
||||
register "has_power_resource" = "true"
|
||||
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C06)"
|
||||
device ref usb2_port3 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Type-A Port 0""
|
||||
register "type" = "UPC_TYPE_A"
|
||||
register "group" = "ACPI_PLD_GROUP(3, 1)"
|
||||
device ref usb2_port5 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB2 Type-A Port 1""
|
||||
register "type" = "UPC_TYPE_A"
|
||||
register "group" = "ACPI_PLD_GROUP(4, 1)"
|
||||
device ref usb2_port6 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB3 Type-A Port 0""
|
||||
register "type" = "UPC_TYPE_USB3_A"
|
||||
register "group" = "ACPI_PLD_GROUP(3, 2)"
|
||||
device ref usb3_port1 on end
|
||||
end
|
||||
chip drivers/usb/acpi
|
||||
register "desc" = ""USB3 Type-A Port 1""
|
||||
register "type" = "UPC_TYPE_USB3_A"
|
||||
register "group" = "ACPI_PLD_GROUP(4, 2)"
|
||||
device ref usb3_port2 on end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
device ref pcie_rp9 on
|
||||
register "pcie_rp[PCIE_RP(9)]" = "{
|
||||
.clk_src = 1,
|
||||
.clk_req = 1,
|
||||
.flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,
|
||||
}"
|
||||
chip soc/intel/common/block/pcie/rtd3
|
||||
register "is_storage" = "true"
|
||||
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B16)"
|
||||
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E03)"
|
||||
register "srcclk_pin" = "1"
|
||||
device generic 0 on end
|
||||
end
|
||||
end # Gen5 M.2 SSD
|
||||
device ref cnvi_wifi on
|
||||
chip drivers/wifi/generic
|
||||
register "wake" = "GPE0_PME_B0"
|
||||
register "add_acpi_dma_property" = "true"
|
||||
register "enable_cnvi_ddr_rfim" = "true"
|
||||
use cnvi_bluetooth as bluetooth_companion
|
||||
device generic 0 on end
|
||||
end
|
||||
end # CNVi
|
||||
|
||||
device ref cnvi_bluetooth on end
|
||||
|
||||
# NOTE: i2c0 is function 0; hence it needs to be enabled when any of i2c1-5 is enabled.
|
||||
# TPM device is under i2c3. Therefore, i2c0 needs to be enabled anyways.
|
||||
device ref i2c0 on end
|
||||
device ref i2c3 on
|
||||
chip drivers/i2c/tpm
|
||||
register "hid" = ""GOOG0005""
|
||||
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E02_IRQ)"
|
||||
device i2c 50 on end
|
||||
end
|
||||
end # I2C3
|
||||
device ref i2c4 on
|
||||
chip drivers/i2c/hid
|
||||
register "generic.hid" = ""PIXA2305""
|
||||
register "generic.desc" = ""PIXA Touchpad""
|
||||
register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E18_IRQ)"
|
||||
# NOTE: pmc_gpe0_dw2 is GPP_E in baseboard devicetree.cb.
|
||||
register "generic.wake" = "GPE0_DW2_18"
|
||||
register "generic.detect" = "1"
|
||||
register "hid_desc_reg_offset" = "0x20"
|
||||
device i2c 68 on end
|
||||
end
|
||||
end # I2C4
|
||||
device ref i2c5 on
|
||||
chip drivers/i2c/hid
|
||||
register "generic.hid" = ""ELAN9004""
|
||||
register "generic.desc" = ""ELAN Touchscreen""
|
||||
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F18)"
|
||||
register "generic.detect" = "1"
|
||||
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F16)"
|
||||
register "generic.reset_delay_ms" = "150"
|
||||
register "generic.reset_off_delay_ms" = "1"
|
||||
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F08)"
|
||||
register "generic.enable_delay_ms" = "6"
|
||||
register "generic.enable_off_delay_ms" = "30"
|
||||
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E05)"
|
||||
register "generic.stop_off_delay_ms" = "1"
|
||||
register "generic.has_power_resource" = "1"
|
||||
register "generic.use_gpio_for_status" = "true"
|
||||
register "hid_desc_reg_offset" = "0x01"
|
||||
device i2c 0x10 on end
|
||||
end
|
||||
end # I2C5
|
||||
device ref gspi0 on
|
||||
chip drivers/spi/acpi
|
||||
register "name" = ""CRFP""
|
||||
register "hid" = "ACPI_DT_NAMESPACE_HID"
|
||||
register "uid" = "1"
|
||||
register "compat_string" = ""google,cros-ec-spi""
|
||||
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E22_IRQ)"
|
||||
register "wake" = "GPE0_DW2_22"
|
||||
register "has_power_resource" = "true"
|
||||
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C15)"
|
||||
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E19)"
|
||||
register "enable_delay_ms" = "3"
|
||||
device spi 0 on end
|
||||
end
|
||||
end
|
||||
|
||||
device ref smbus on end
|
||||
device ref hda on
|
||||
chip drivers/intel/soundwire
|
||||
device generic 0 on
|
||||
chip drivers/soundwire/alc711
|
||||
register "desc" = ""Headset Codec""
|
||||
register "alc711_address.version" = "SOUNDWIRE_VERSION_1_2"
|
||||
register "alc711_address.class" = "MIPI_CLASS_SDCA"
|
||||
register "alc711_address.part_id" = "MIPI_DEV_ID_REALTEK_ALC721"
|
||||
# SoundWire Link 3 ID 1
|
||||
device generic 3.1 on end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue