mb/google/trulo/var/pujjolo: Change ICCmax at VCCIN_AUX from 25A to 27A
Becasue of requirement for VCCANA power from MBVR mode to FIVR mode, so change ICCmax at VCCIN_AUX will be from 25A to 27A due to internal VR. BUG=b:417662158 TEST=Build and boot to OS at the rework motherboard and verfied by power team. Change-Id: Ie036412c0e435cfce39940de6bab363f9e875f42 Signed-off-by: Luca Lai <luca.lai@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88558 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -6,4 +6,5 @@ romstage-y += memory.c
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ramstage-y += gpio.c
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ramstage-y += variant.c
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ramstage-y += ramstage.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c
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src/mainboard/google/brya/variants/pujjolo/ramstage.c
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11
src/mainboard/google/brya/variants/pujjolo/ramstage.c
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@ -0,0 +1,11 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <soc/ramstage.h>
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void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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{
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/* Refer to FSP Silicon (soc/intel/alderlake/fsp_params.c)
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VccIn Aux Imon IccMax. Values are in 1/4 Amp increments */
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params->VccInAuxImonIccImax = 108; /* 30000(30A) * 4 / 1000 */
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printk(BIOS_INFO, "Override VccInAuxImonIccImax = %d\n", params->VccInAuxImonIccImax);
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}
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