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UPSTREAM: intel/broadwell: fix typo

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(pci_read_config32(...) > 14) & 0x3 looks rather unusual (and prevents
"case 3" below from ever happening)

BUG=None
BRANCH=None
TEST=None

Change-Id: Ifd1911d792e7e331ca7dd88f73b93b997f1436e3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Found-by: Coverity Scan #1293139
Reviewed-on: https://review.coreboot.org/15965
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/366275
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Patrick Georgi 2016-07-29 18:53:34 +02:00 • committed by chrome-bot
commit 94419f2368
1 changed files with 1 additions and 1 deletions
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2
src/soc/intel/broadwell/pcie.c
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@ -99,7 +99,7 @@ static void root_port_config_update_gbe_port(void)
static void pcie_iosf_port_grant_count(device_t dev)
{
u8 update_val;
u32 rpcd = (pci_read_config32(dev, 0xfc) > 14) & 0x3;
u32 rpcd = (pci_read_config32(dev, 0xfc) >> 14) & 0x3;
switch (rpcd) {
case 1: