From 94419f2368cf1ec4aa488846479a08bfe8faa32b Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Fri, 29 Jul 2016 18:53:34 +0200 Subject: [PATCH] UPSTREAM: intel/broadwell: fix typo (pci_read_config32(...) > 14) & 0x3 looks rather unusual (and prevents "case 3" below from ever happening) BUG=None BRANCH=None TEST=None Change-Id: Ifd1911d792e7e331ca7dd88f73b93b997f1436e3 Signed-off-by: Patrick Georgi Found-by: Coverity Scan #1293139 Reviewed-on: https://review.coreboot.org/15965 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/366275 Commit-Ready: Furquan Shaikh Tested-by: Furquan Shaikh Reviewed-by: Furquan Shaikh --- src/soc/intel/broadwell/pcie.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c index 41d66e2f2a..1c9b50cceb 100644 --- a/src/soc/intel/broadwell/pcie.c +++ b/src/soc/intel/broadwell/pcie.c @@ -99,7 +99,7 @@ static void root_port_config_update_gbe_port(void) static void pcie_iosf_port_grant_count(device_t dev) { u8 update_val; - u32 rpcd = (pci_read_config32(dev, 0xfc) > 14) & 0x3; + u32 rpcd = (pci_read_config32(dev, 0xfc) >> 14) & 0x3; switch (rpcd) { case 1: