mips: HACK disable caches in bootblock startup code

Until proper MIPS cache management is available it is necessary to
disable data and instruction caches, otherwise code placed in memory
stays in data cache and is not available for instruction fetched.

BRANCH=none
BUG=chrome-os-partner:31438,chrome-os-partner:34127
TEST=coreboot loading rombase and rambase now succeeds.

Change-Id: Ib195ed6e5f08ccaa6bbe3325c2199171bfb63b88
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/232191
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/arch/mips/bootblock.S

@@ -36,6 +36,16 @@ _start:
 	bne	$t0, $t1, 1b
 	addi	$t0, $t0, 4
 
+	/*
+	 * Disable caches for now, proper cache management is coming soon.
+	 * http://crosbug.com/p/34127
+	 */
+	mfc0	$t0, $16
+	li	$t1, -8
+	and	$t0, $t0, $t1
+	ori	$t0, $t0, 2
+	mtc0	$t0, $16
+
 	/* Run main */
 	b	main