From 93d5bfa1d01fbbabbabef33a22287ceeea28b15b Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Sat, 29 Nov 2014 14:35:49 -0800 Subject: [PATCH] mips: HACK disable caches in bootblock startup code Until proper MIPS cache management is available it is necessary to disable data and instruction caches, otherwise code placed in memory stays in data cache and is not available for instruction fetched. BRANCH=none BUG=chrome-os-partner:31438,chrome-os-partner:34127 TEST=coreboot loading rombase and rambase now succeeds. Change-Id: Ib195ed6e5f08ccaa6bbe3325c2199171bfb63b88 Signed-off-by: Vadim Bendebury Reviewed-on: https://chromium-review.googlesource.com/232191 Reviewed-by: Aaron Durbin --- src/arch/mips/bootblock.S | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/arch/mips/bootblock.S b/src/arch/mips/bootblock.S index 8899fe0a97..ed31b24cfa 100644 --- a/src/arch/mips/bootblock.S +++ b/src/arch/mips/bootblock.S @@ -36,6 +36,16 @@ _start: bne $t0, $t1, 1b addi $t0, $t0, 4 + /* + * Disable caches for now, proper cache management is coming soon. + * http://crosbug.com/p/34127 + */ + mfc0 $t0, $16 + li $t1, -8 + and $t0, $t0, $t1 + ori $t0, $t0, 2 + mtc0 $t0, $16 + /* Run main */ b main