veyron: change .ddrconfig from 14 to 3

There are two configs sdram-lpddr3-hynix-2GB.inc and
sdram-lpddr3-samsung-2GB-24EB.inc use .ddrconfig = 14 now.

Changing .ddrconfig from 14 to 3 could help improving performance
especially when accessing to contiguous memory. Comparing the .ddrconfig:
 - if .ddrconfig = 3,
   C RDRR RRRR RRRR RRRR RBBB CCCC CCCC C---
 - if .ddrconfig = 14,
   C DRBB BRRR RRRR RRRR RRRR CCCC CCCC C---
where
 - R: indicates Row bits
 - B: indicates Bank bits
 - C: indicates Column bits
 - D: indicates Chip selects bits

Because with .ddrconfig = 3, there are multi banks switching and saving
DDR timing.

BUG=chrome-os-partner:57321
TEST=Boot from fievel and play video
BRANCH=veyron

Change-Id: Ic98ebae48609a7604ec678b6bd14dd2b29b669c4
Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/404691
Commit-Ready: Shunqian Zheng <zhengsq@rock-chips.com>
Tested-by: Shunqian Zheng <zhengsq@rock-chips.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
ZhengShunQian 2016-10-28 16:16:04 +08:00 committed by chrome-bot
commit 93882e4f20
12 changed files with 12 additions and 12 deletions

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -70,7 +70,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,

View file

@ -69,7 +69,7 @@
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 14,
.ddrconfig = 3,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,