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mb/google/fatcat/var/lapis: Modify parameters to reduce acoustic noise

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The acoustic noise test fail on lapis, based on power engineer's suggestion, modify the relevant parameters in overridetree.cb.

BUG=b:482855004
TEST=emerge-fatcat coreboot, test pass by power engineer

Change-Id: I5ab48ed56fc04d57dd5c02d5512891b17147d391
Signed-off-by: Hualin Wei <weihualin@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91562
Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Hualin Wei 2026-03-05 16:32:49 +08:00 • committed by Matt DeVillier
commit 92a430baee
1 changed files with 22 additions and 15 deletions
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37
src/mainboard/google/fatcat/variants/lapis/overridetree.cb
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@ -64,21 +64,6 @@ chip soc/intel/pantherlake
register "pmc_gpe0_dw1" = "GPP_F"
register "pmc_gpe0_dw2" = "GPP_E"
register "power_limits_config[PTL_CORE_1]" = "{
.tdp_pl1_override = 15,
.tdp_pl2_override = 25,
}"
register "power_limits_config[PTL_CORE_3]" = "{
.tdp_pl1_override = 25,
.tdp_pl2_override = 25,
}"
register "power_limits_config[PTL_CORE_4]" = "{
.tdp_pl1_override = 25,
.tdp_pl2_override = 25,
}"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # LED
@ -128,6 +113,28 @@ chip soc/intel/pantherlake
},
}"
# As per document 813278, the following PTL SoC supports Fast
# V-Mode (FVM) on cores (IA), Graphics (GT), and System Agent
# (SA). The ICC Limit is represented in 1/4 A increments,
# i.e., a value of 400 = 100A.
register "enable_fast_vmode[VR_DOMAIN_IA]" = "false"
register "cep_enable[VR_DOMAIN_IA]" = "false"
register "enable_fast_vmode[VR_DOMAIN_GT]" = "false"
register "cep_enable[VR_DOMAIN_GT]" = "false"
register "enable_fast_vmode[VR_DOMAIN_SA]" = "false"
register "cep_enable[VR_DOMAIN_SA]" = "false"
# Acoustic Noise settings and slew rate configuration:
register "enable_acoustic_noise_mitigation" = "true"
register "disable_fast_pkgc_ramp[VR_DOMAIN_IA]" = "false"
register "slow_slew_rate_config[VR_DOMAIN_IA]" = "SLEW_FAST_4"
register "disable_fast_pkgc_ramp[VR_DOMAIN_GT]" = "true"
register "slow_slew_rate_config[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "disable_fast_pkgc_ramp[VR_DOMAIN_SA]" = "false"
register "slow_slew_rate_config[VR_DOMAIN_SA]" = "SLEW_FAST_4"
register "pcore_hysteresis_window_ms" = "50" #ms
register "ecore_hysteresis_window_ms" = "50" #ms
device domain 0 on
subsystemid 0x1043 0x15e4 inherit
device ref dtt on