From 92a430baeed45dcb7442af5c979a08dca5a15356 Mon Sep 17 00:00:00 2001 From: Hualin Wei Date: Thu, 5 Mar 2026 16:32:49 +0800 Subject: [PATCH] mb/google/fatcat/var/lapis: Modify parameters to reduce acoustic noise The acoustic noise test fail on lapis, based on power engineer's suggestion, modify the relevant parameters in overridetree.cb. BUG=b:482855004 TEST=emerge-fatcat coreboot, test pass by power engineer Change-Id: I5ab48ed56fc04d57dd5c02d5512891b17147d391 Signed-off-by: Hualin Wei Reviewed-on: https://review.coreboot.org/c/coreboot/+/91562 Reviewed-by: Weimin Wu Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- .../fatcat/variants/lapis/overridetree.cb | 37 +++++++++++-------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/src/mainboard/google/fatcat/variants/lapis/overridetree.cb b/src/mainboard/google/fatcat/variants/lapis/overridetree.cb index 6855616bb9..3353bf5c8d 100644 --- a/src/mainboard/google/fatcat/variants/lapis/overridetree.cb +++ b/src/mainboard/google/fatcat/variants/lapis/overridetree.cb @@ -64,21 +64,6 @@ chip soc/intel/pantherlake register "pmc_gpe0_dw1" = "GPP_F" register "pmc_gpe0_dw2" = "GPP_E" - register "power_limits_config[PTL_CORE_1]" = "{ - .tdp_pl1_override = 15, - .tdp_pl2_override = 25, - }" - - register "power_limits_config[PTL_CORE_3]" = "{ - .tdp_pl1_override = 25, - .tdp_pl2_override = 25, - }" - - register "power_limits_config[PTL_CORE_4]" = "{ - .tdp_pl1_override = 25, - .tdp_pl2_override = 25, - }" - register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # LED @@ -128,6 +113,28 @@ chip soc/intel/pantherlake }, }" + # As per document 813278, the following PTL SoC supports Fast + # V-Mode (FVM) on cores (IA), Graphics (GT), and System Agent + # (SA). The ICC Limit is represented in 1/4 A increments, + # i.e., a value of 400 = 100A. + register "enable_fast_vmode[VR_DOMAIN_IA]" = "false" + register "cep_enable[VR_DOMAIN_IA]" = "false" + register "enable_fast_vmode[VR_DOMAIN_GT]" = "false" + register "cep_enable[VR_DOMAIN_GT]" = "false" + register "enable_fast_vmode[VR_DOMAIN_SA]" = "false" + register "cep_enable[VR_DOMAIN_SA]" = "false" + + # Acoustic Noise settings and slew rate configuration: + register "enable_acoustic_noise_mitigation" = "true" + register "disable_fast_pkgc_ramp[VR_DOMAIN_IA]" = "false" + register "slow_slew_rate_config[VR_DOMAIN_IA]" = "SLEW_FAST_4" + register "disable_fast_pkgc_ramp[VR_DOMAIN_GT]" = "true" + register "slow_slew_rate_config[VR_DOMAIN_GT]" = "SLEW_FAST_8" + register "disable_fast_pkgc_ramp[VR_DOMAIN_SA]" = "false" + register "slow_slew_rate_config[VR_DOMAIN_SA]" = "SLEW_FAST_4" + register "pcore_hysteresis_window_ms" = "50" #ms + register "ecore_hysteresis_window_ms" = "50" #ms + device domain 0 on subsystemid 0x1043 0x15e4 inherit device ref dtt on