soc/mediatek/mt8196: Add MTE tag memory to bootmem
This patch enables MTE (Memory Tagging Extension) for the MediaTek MT8196 SoC. During `soc_init`, it calculates the required size and start address for the MTE tag storage based on the physical DRAM size. It then calls `booker_mte_init` to initialize the MTE hardware with the calculated start address. Later, during memory initialization, `bootmem_platform_add_ranges` uses `bootmem_add_range_from` to reserve the calculated memory region for MTE tag storage, preventing it from being used for other purposes. BUG=b:438666196 TEST=Check cbmem log. [DEBUG] booker_mte_init: MTE tag addr 0x460f70000 ... [DEBUG] 17. 0000000460f70000-000000047ffeffff: TAG STORAGE [DEBUG] 18. 000000047fff0000-000000047fffffff: RESERVED Change-Id: I7caa4fde4f314261383a68e942b0e3fb06c6184b Signed-off-by: Yidi Lin <yidilin@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90144 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Chen-Tsung Hsieh <chentsung@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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3 changed files with 23 additions and 2 deletions
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@ -12,7 +12,7 @@ void reserve_buffer_for_dramc(void)
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{
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const struct mem_chip_info *mc = cbmem_find(CBMEM_ID_MEM_CHIP_INFO);
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int i;
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const uint32_t reserved_size = 64 * KiB;
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const uint32_t reserved_size = HW_TX_TRACING_BUF_SIZE;
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uint64_t cbmem_top_addr = cbmem_top();
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uint64_t reserved_addr;
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uint64_t rank_size_sum = 0;
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@ -3,6 +3,10 @@
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#ifndef __SOC_MEDIATEK_COMMON_DRAMC_INFO_H__
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#define __SOC_MEDIATEK_COMMON_DRAMC_INFO_H__
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#include <commonlib/bsd/helpers.h>
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#define HW_TX_TRACING_BUF_SIZE (64 * KiB)
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void reserve_buffer_for_dramc(void);
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#endif /* __SOC_MEDIATEK_COMMON_DRAMC_INFO_H__ */
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@ -19,6 +19,9 @@
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#include <soc/symbols.h>
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#include <symbols.h>
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static uint64_t mte_start;
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static size_t mte_size;
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void bootmem_platform_add_ranges(void)
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{
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if (CONFIG(ARM64_BL31_OPTEE_WITH_SMC))
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@ -30,6 +33,8 @@ void bootmem_platform_add_ranges(void)
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bootmem_add_range((uint64_t)_resv_mem_gpu, REGION_SIZE(resv_mem_gpu), BM_MEM_RESERVED);
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bootmem_add_range((uint64_t)_resv_mem_gpueb,
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REGION_SIZE(resv_mem_gpueb), BM_MEM_RESERVED);
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bootmem_add_range_from(mte_start, mte_size, BM_MEM_TAG, BM_MEM_RAM);
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}
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static void soc_read_resources(struct device *dev)
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@ -37,6 +42,18 @@ static void soc_read_resources(struct device *dev)
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ram_range(dev, 0, (uintptr_t)_dram, sdram_size());
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}
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#define MTE_SIZE_ALIGNMENT (64 * KiB)
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static void mte_setup(void)
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{
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size_t dram_size = sdram_size();
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mte_size = ALIGN_UP(dram_size / 33, MTE_SIZE_ALIGNMENT);
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mte_start = ALIGN_DOWN((uint64_t)_dram + dram_size - mte_size - HW_TX_TRACING_BUF_SIZE,
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MTE_SIZE_ALIGNMENT);
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booker_mte_init(mte_start);
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}
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static void soc_init(struct device *dev)
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{
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uint32_t storage_type = mainboard_get_storage_type();
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@ -57,7 +74,7 @@ static void soc_init(struct device *dev)
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* Registers are only accessible by Secure accesses. Writes to them must occur prior to
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* the first non-configuration access targeting the device.
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*/
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booker_mte_init(MTE_TAG_ADDR);
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mte_setup();
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}
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static struct device_operations soc_ops = {
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