soc/amd/cezanne/acpi: Move SMN accessor to DSDT

Move the SMN accessor code from SSDT code to DSDT.
This allows compiletime verification of the ACPI code.

Change-Id: I3cddea079f3bfc37eb4e2b2f4496dce6441b289f
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91184
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph 2026-02-12 16:24:22 +01:00 committed by Matt DeVillier
commit 90d9411271
3 changed files with 20 additions and 48 deletions

View file

@ -11,9 +11,6 @@ Scope (\_SB.PCI0.GP41) {
Return (STAT)
}
External (\_SB.PCI0.GNB.SMNA, FieldUnitObj)
External (\_SB.PCI0.GNB.SMND, FieldUnitObj)
/* Read SMN register and store value into ACPI variable */
Method (SMNR, 1, Serialized)
{

View file

@ -15,6 +15,26 @@ Device (GNB)
{
Return (0x0F)
}
/* Add opregion to host bridge needed for ACP driver.
*
* This is used by an ACPI method in the ACP's ACPI code to access different mailbox
* interfaces in the hardware. Some ACP drivers will use that to both notify the PSP
* that the DSP firmware has been loaded, so that the PSP can validate the firmware
* and set the qualifier bit to enable running it, and to configure the ACP's clock
* source.
*
* As this SMN access is not arbitrated and there may be other drivers or parts of
* the firmware attempting to use the SMN access register pair, there is a risk of
* conflict / incorrect data, but given the frequency and duration of accesses, the
* risk is deemed to be quite low.
*/
OperationRegion (PSMN, PCI_Config, 0x00, 0x100)
Field(PSMN, AnyAcc, NoLock, Preserve) {
Offset (0xB8),
SMNA, 32,
SMND, 32,
}
}
/* PCIe GPP */

View file

@ -59,51 +59,6 @@ static void root_complex_fill_ssdt(const struct device *device)
{
if (CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC))
acipgen_dptci();
/* Add ACPI device, opregion to host bridge needed for ACP driver.
*
* This is used by an ACPI method in the ACP's ACPI code to access different mailbox
* interfaces in th hardware. Some ACP drivers will use that to both notify the PSP
* that the DSP firmware has been loaded, so that the PSP can validate the firmware
* and set the qualifier bit to enable running it, and to configure the ACP's clock
* source.
*
* As this SMN access is not arbitrated and there may be other drivers or parts of
* the firmware attempting to use the SMN access register pair, there is a risk of
* conflict / incorrect data, but given the frequency and duration of accesses, the
* risk is deemed to be quite low.
*
* Scope (\_SB.PCI0)
* {
* Device (GNB)
* {
* Name (_ADR, 0x0000000000000000)
* Method (_STA, 0, NotSerialized)
* {
* Return (0x0F)
* }
* }
* }
* Scope (\_SB.PCI0.GNB)
* {
* OperationRegion(SMN, SystemMemory , 0xF80000B8, 0x8)
* Field(SMN, AnyAcc, NoLock, Preserve) {
* SMNA, 32,
* SMND, 32,
* }
* }
*/
acpigen_write_scope(acpi_device_path(device));
struct opregion opreg = OPREGION("SMN", SYSTEMMEMORY,
CONFIG_ECAM_MMCONF_BASE_ADDRESS + 0xb8, 0x8);
acpigen_write_opregion(&opreg);
static const struct fieldlist list[] = {
FIELDLIST_NAMESTR("SMNA", 32),
FIELDLIST_NAMESTR("SMND", 32),
};
acpigen_write_field(opreg.name, list, ARRAY_SIZE(list),
FIELD_ANYACC | FIELD_NOLOCK | FIELD_PRESERVE);
acpigen_write_scope_end();
}
static const char *gnb_acpi_name(const struct device *dev)