sb/intel/common/gpio: Add and use gpio_invert()

Introduce a new helper function to set the INVERT bits on
the first GPIO bank. Use it on google link instead of using
a custom implementation.

Change-Id: Icfdbc3dcae5678695b6fcc9dab7ff97d291963cd
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88565
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph 2025-07-26 09:20:06 +02:00 committed by Matt DeVillier
commit 8d4bb94663
3 changed files with 21 additions and 7 deletions

View file

@ -114,13 +114,7 @@ static void mainboard_init(struct device *dev)
google_chromeec_get_board_version(&board_version);
if (board_version == 0) {
/* If running on proto1 - enable reversion of gpio11. */
u32 gpio_inv;
u16 gpio_base = pci_read_config16
(pcidev_on_root(0x1f, 0), GPIO_BASE) &
0xfffc;
u16 gpio_inv_addr = gpio_base + GPI_INV;
gpio_inv = inl(gpio_inv_addr);
outl(gpio_inv | (1 << 11), gpio_inv_addr);
gpio_invert(11, true);
}
}

View file

@ -222,3 +222,19 @@ void gpio_output(gpio_t gpio_num, int value)
/* Set value again in case output register was gated */
gpio_set(gpio_num, value);
}
void gpio_invert(gpio_t gpio_num, bool invert)
{
u16 gpio_blink_reg = get_gpio_base() + GPI_INV;
u32 config;
if (gpio_num >= 32)
return; /* Just ignore wrong gpio numbers. */
config = inl(gpio_blink_reg);
if (invert)
config |= BIT(gpio_num);
else
config &= ~BIT(gpio_num);
outl(gpio_blink_reg, config);
}

View file

@ -4,6 +4,7 @@
#define INTEL_COMMON_GPIO_H
#include <stdint.h>
#include <stdbool.h>
#include <soc/gpio.h>
/* ICH7 GPIOBASE */
@ -153,4 +154,7 @@ void setup_pch_gpios(const struct pch_gpio_map *gpio);
int gpio_is_native(int gpio_num);
/* Enable/disable GPI_INV for the specified GPIO */
void gpio_invert(gpio_t gpio_num, bool invert);
#endif