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baytrail: add in C0 stepping idenitification support.

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The C0 cpuid's were added as well as the microcode, but we
weren't making C0 a first class citizen in the pattrs.

BUG=chrome-os-partner:24542
BRANCH=baytrail
TEST=Built and booted b3.

Change-Id: Ie23f8ce867f339eab3b55b8c5f49ab822f23eebb
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/183594
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Aaron Durbin 2014-01-23 16:25:11 -06:00 • committed by chrome-internal-fetch
commit 8ad02684b2
2 changed files with 9 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/soc/intel/baytrail/baytrail/lpc.h
View file

@ -36,6 +36,7 @@
#define RID_A_STEPPING_START 1
#define RID_B_STEPPING_START 5
#define RID_C_STEPPING_START 0xe
enum baytrail_stepping {
STEP_A0,
STEP_A1,
@ -43,6 +44,7 @@ enum baytrail_stepping {
STEP_B1,
STEP_B2,
STEP_B3,
STEP_C0,
};
#endif /* _BAYTRAIL_LPC_H_ */

9
src/soc/intel/baytrail/ramstage.c
View file

@ -72,7 +72,9 @@ static inline void fill_in_msr(msr_t *msr, int idx)
}
}
static const char *stepping_str[] = { "A0", "A1", "B0", "B1", "B2", "B3" };
static const char *stepping_str[] = {
"A0", "A1", "B0", "B1", "B2", "B3", "C0"
};
static void fill_in_pattrs(void)
{
@ -84,7 +86,10 @@ static void fill_in_pattrs(void)
dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
attrs->revid = pci_read_config8(dev, REVID);
/* The revision to stepping IDs have two values per metal stepping. */
if (attrs->revid >= RID_B_STEPPING_START) {
if (attrs->revid >= RID_C_STEPPING_START) {
attrs->stepping = (attrs->revid - RID_C_STEPPING_START) / 2;
attrs->stepping += STEP_C0;
} else if (attrs->revid >= RID_B_STEPPING_START) {
attrs->stepping = (attrs->revid - RID_B_STEPPING_START) / 2;
attrs->stepping += STEP_B0;
} else {