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mb/lenovo/m900_tiny: disable CLKREQ for SSD and Wi-Fi slots

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It's been observed that at least on some M700 Tiny boards, CLKREQ
signals aren't wired as per the schematic. Disable them and configure
their pads as per original Lenovo UEFI.

This change fixes Wi-Fi card detection on M700 Tiny.

TEST=Boot M700 Tiny with AX200 card in Wi-Fi card slot and boot to
Windows 10. Check that Wi-Fi works correctly.

Change-Id: I5b26937cd4a6937b516304fefad9186b9e1cdc76
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84813
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michał Kopeć 2024-10-20 18:10:14 +02:00 • committed by Matt DeVillier
commit 89cdd8d491
2 changed files with 2 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

4
src/mainboard/lenovo/m900_tiny/devicetree.cb
View file

@ -162,8 +162,6 @@ chip soc/intel/skylake
end
device ref pcie_rp17 on # M.2 2280 / 2242 - SSD
register "PcieRpEnable[16]" = "1"
register "PcieRpClkReqSupport[16]" = "1"
register "PcieRpClkReqNumber[16]" = "1"
register "PcieRpAdvancedErrorReporting[16]" = "1"
register "PcieRpLtrEnable[16]" = "true"
register "PcieRpClkSrcNumber[16]" = "7"
@ -171,8 +169,6 @@ chip soc/intel/skylake
end
device ref pcie_rp7 on # M.2 2230 - WLAN
register "PcieRpEnable[6]" = "1"
register "PcieRpClkReqSupport[6]" = "1"
register "PcieRpClkReqNumber[6]" = "11"
register "PcieRpAdvancedErrorReporting[6]" = "1"
register "PcieRpLtrEnable[6]" = "true"
register "PcieRpClkSrcNumber[6]" = "1"

4
src/mainboard/lenovo/m900_tiny/gpio.c
View file

@ -42,7 +42,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_TRIG_OWN(GPP_B3, NONE, PLTRST, OFF, ACPI),
PAD_CFG_GPI_TRIG_OWN(GPP_B4, NONE, PLTRST, OFF, ACPI),
PAD_NC(GPP_B5, NONE),
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
PAD_CFG_GPI_TRIG_OWN(GPP_B6, NONE, PLTRST, OFF, ACPI),
PAD_NC(GPP_B7, NONE),
PAD_NC(GPP_B8, NONE),
PAD_NC(GPP_B9, NONE),
@ -192,7 +192,7 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_H2, NONE),
PAD_NC(GPP_H3, NONE),
PAD_CFG_GPI_TRIG_OWN(GPP_H4, NONE, PLTRST, OFF, ACPI),
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
PAD_NC(GPP_H5, NONE),
PAD_CFG_GPI_TRIG_OWN(GPP_H6, NONE, PLTRST, OFF, ACPI),
PAD_NC(GPP_H7, NONE),
PAD_NC(GPP_H8, NONE),