From 89cdd8d4919b043369eab34e36174b3f9259ee8c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= Date: Sun, 20 Oct 2024 18:10:14 +0200 Subject: [PATCH] mb/lenovo/m900_tiny: disable CLKREQ for SSD and Wi-Fi slots MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's been observed that at least on some M700 Tiny boards, CLKREQ signals aren't wired as per the schematic. Disable them and configure their pads as per original Lenovo UEFI. This change fixes Wi-Fi card detection on M700 Tiny. TEST=Boot M700 Tiny with AX200 card in Wi-Fi card slot and boot to Windows 10. Check that Wi-Fi works correctly. Change-Id: I5b26937cd4a6937b516304fefad9186b9e1cdc76 Signed-off-by: Michał Kopeć Reviewed-on: https://review.coreboot.org/c/coreboot/+/84813 Reviewed-by: Martin L Roth Tested-by: build bot (Jenkins) --- src/mainboard/lenovo/m900_tiny/devicetree.cb | 4 ---- src/mainboard/lenovo/m900_tiny/gpio.c | 4 ++-- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/src/mainboard/lenovo/m900_tiny/devicetree.cb b/src/mainboard/lenovo/m900_tiny/devicetree.cb index c2ac2ba780..88245c3c1d 100644 --- a/src/mainboard/lenovo/m900_tiny/devicetree.cb +++ b/src/mainboard/lenovo/m900_tiny/devicetree.cb @@ -162,8 +162,6 @@ chip soc/intel/skylake end device ref pcie_rp17 on # M.2 2280 / 2242 - SSD register "PcieRpEnable[16]" = "1" - register "PcieRpClkReqSupport[16]" = "1" - register "PcieRpClkReqNumber[16]" = "1" register "PcieRpAdvancedErrorReporting[16]" = "1" register "PcieRpLtrEnable[16]" = "true" register "PcieRpClkSrcNumber[16]" = "7" @@ -171,8 +169,6 @@ chip soc/intel/skylake end device ref pcie_rp7 on # M.2 2230 - WLAN register "PcieRpEnable[6]" = "1" - register "PcieRpClkReqSupport[6]" = "1" - register "PcieRpClkReqNumber[6]" = "11" register "PcieRpAdvancedErrorReporting[6]" = "1" register "PcieRpLtrEnable[6]" = "true" register "PcieRpClkSrcNumber[6]" = "1" diff --git a/src/mainboard/lenovo/m900_tiny/gpio.c b/src/mainboard/lenovo/m900_tiny/gpio.c index aecea414a2..4c4bac4b8e 100644 --- a/src/mainboard/lenovo/m900_tiny/gpio.c +++ b/src/mainboard/lenovo/m900_tiny/gpio.c @@ -42,7 +42,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI_TRIG_OWN(GPP_B3, NONE, PLTRST, OFF, ACPI), PAD_CFG_GPI_TRIG_OWN(GPP_B4, NONE, PLTRST, OFF, ACPI), PAD_NC(GPP_B5, NONE), - PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), + PAD_CFG_GPI_TRIG_OWN(GPP_B6, NONE, PLTRST, OFF, ACPI), PAD_NC(GPP_B7, NONE), PAD_NC(GPP_B8, NONE), PAD_NC(GPP_B9, NONE), @@ -192,7 +192,7 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_H2, NONE), PAD_NC(GPP_H3, NONE), PAD_CFG_GPI_TRIG_OWN(GPP_H4, NONE, PLTRST, OFF, ACPI), - PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), + PAD_NC(GPP_H5, NONE), PAD_CFG_GPI_TRIG_OWN(GPP_H6, NONE, PLTRST, OFF, ACPI), PAD_NC(GPP_H7, NONE), PAD_NC(GPP_H8, NONE),