soc/intel/common/acpi/pcie_clk: Fix ACPI conditional compilation error

This commit addresses a compilation error in the PCIe ClkReq SPCO method
due to incorrect conditional compilation logic. The previous
implementation lacked the necessary preprocessor directives to
differentiate between configurations when
SOC_INTEL_COMMON_BLOCK_IOE_P2SB is not defined.

BUG=b:422284273

Change-Id: Ie7b70babd279f7241f6e76113a6694a5bd0d782d
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87930
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Jeremy Compostella 2025-06-03 15:43:52 -07:00 committed by Subrata Banik
commit 8961f6681f

View file

@ -14,6 +14,7 @@
* Arg1: Enable(1)/Disable(0) Clock
*/
Method (SPCO, 2, Serialized) {
#if CONFIG(SOC_INTEL_COMMON_BLOCK_IOE_P2SB)
If (LEqual (Arg1,1)) {
If (LGreaterEqual (Arg0, CONFIG_IOE_DIE_CLOCK_START)) {
\_SB.ECLK.CLKE (Subtract (Arg0, CONFIG_IOE_DIE_CLOCK_START))
@ -27,4 +28,11 @@ Method (SPCO, 2, Serialized) {
\_SB.ICLK.CLKD (Arg0)
}
}
#else
If (LEqual (Arg1,1)) {
\_SB.ICLK.CLKE (Arg0)
} Else {
\_SB.ICLK.CLKD (Arg0)
}
#endif
}