soc/amd/common/acpi/lpc.asl: Report ESPI1 fixed resource

There is ESPI1 fixed resource living 64K above the ESPI0 fixed
resource. Report it if the hardware has ESPI1 bus.

Change-Id: I7245850450cfa9de326f26c83c4f01c8d167f8be
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89489
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
This commit is contained in:
Michał Żygowski 2025-10-06 12:12:31 +02:00
commit 8929659d93
2 changed files with 17 additions and 0 deletions

View file

@ -34,6 +34,13 @@ Device(LPCB) {
0x00001000, // Address Length
BAR1 // Descriptor Name
)
#if CONFIG(SOC_AMD_COMMON_BLOCK_HAS_ESPI1)
Memory32Fixed(ReadWrite, // Setup for fixed resource location for eSPI1 base address
0x00000000, // Address Base
0x00001000, // Address Length
BAR2
)
#endif
})
Method(_CRS,0,Serialized)
@ -42,6 +49,10 @@ Device(LPCB) {
CreateDwordField(^CRS,^BAR1._BAS,ESPB) // Field to hold eSPI base address
SPIB = SPI_BASE_ADDRESS // SPI base address mapped
ESPB = SPIB + 0x10000 // eSPI base address mapped
#if CONFIG(SOC_AMD_COMMON_BLOCK_HAS_ESPI1)
CreateDwordField(^CRS,^BAR2._BAS,ESP1) // Field to hold eSPI base address
ESP1 = ESPB + 0x10000 // eSPI base address mapped
#endif
Return(CRS)
}
}

View file

@ -58,6 +58,12 @@ config SOC_AMD_COMMON_BLOCK_USE_ESPI
Select this option if mainboard uses eSPI instead of LPC (if supported
by platform).
config SOC_AMD_COMMON_BLOCK_HAS_ESPI1
bool
depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI
help
Select this option if SoC has eSPI1.
config SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN
bool
depends on SOC_AMD_COMMON_BLOCK_USE_ESPI