soc/amd/common/acpi/lpc.asl: Report ESPI1 fixed resource
There is ESPI1 fixed resource living 64K above the ESPI0 fixed resource. Report it if the hardware has ESPI1 bus. Change-Id: I7245850450cfa9de326f26c83c4f01c8d167f8be Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/89489 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
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@ -34,6 +34,13 @@ Device(LPCB) {
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0x00001000, // Address Length
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BAR1 // Descriptor Name
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)
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#if CONFIG(SOC_AMD_COMMON_BLOCK_HAS_ESPI1)
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Memory32Fixed(ReadWrite, // Setup for fixed resource location for eSPI1 base address
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0x00000000, // Address Base
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0x00001000, // Address Length
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BAR2
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)
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#endif
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})
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Method(_CRS,0,Serialized)
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@ -42,6 +49,10 @@ Device(LPCB) {
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CreateDwordField(^CRS,^BAR1._BAS,ESPB) // Field to hold eSPI base address
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SPIB = SPI_BASE_ADDRESS // SPI base address mapped
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ESPB = SPIB + 0x10000 // eSPI base address mapped
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#if CONFIG(SOC_AMD_COMMON_BLOCK_HAS_ESPI1)
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CreateDwordField(^CRS,^BAR2._BAS,ESP1) // Field to hold eSPI base address
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ESP1 = ESPB + 0x10000 // eSPI base address mapped
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#endif
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Return(CRS)
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}
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}
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@ -58,6 +58,12 @@ config SOC_AMD_COMMON_BLOCK_USE_ESPI
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Select this option if mainboard uses eSPI instead of LPC (if supported
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by platform).
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config SOC_AMD_COMMON_BLOCK_HAS_ESPI1
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bool
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depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI
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help
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Select this option if SoC has eSPI1.
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config SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN
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bool
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depends on SOC_AMD_COMMON_BLOCK_USE_ESPI
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