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mb/siemens/mc_rpl1: Switch from LPSS UART to legacy 8250 I/O UART

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Replace the memory-mapped LPSS UART2 with I/O port-mapped legacy
8250 UART for the serial console.

- Replace INTEL_LPSS_UART_FOR_CONSOLE with DRIVERS_UART_8250IO
- Add SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE to enable COM2
- Change UART_FOR_CONSOLE from 2 to 0 (COM1 at 0x3F8)

DRIVERS_UART_8250IO enables COM1 (I/O port 0x3F8).
SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE enables COM2 (I/O port 0x2F8).

TEST=Build and boot on mc_rpl1. Verify console output on both COM1
and COM2.

Change-Id: I93deaba5fedf8c9aecff4a425e8cec406d2759c2
Signed-off-by: Kilian Krause <kilian.krause@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89892
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kilian Krause 2025-11-04 14:27:26 +01:00 • committed by Matt DeVillier
commit 8411fef90f
1 changed files with 3 additions and 2 deletions
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5
src/mainboard/siemens/mc_rpl/variants/mc_rpl1/Kconfig
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@ -4,9 +4,10 @@ if BOARD_SIEMENS_MC_RPL1
config BOARD_SPECIFIC_OPTIONS
def_bool y
select INTEL_LPSS_UART_FOR_CONSOLE
select DRIVERS_UART_8250IO
select MAINBOARD_HAS_TPM2
select MEMORY_MAPPED_TPM
select SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE
select TPM_MEASURED_BOOT
select TPM_MEASURED_BOOT_INIT_BOOTBLOCK
select DRIVER_INTEL_I210
@ -14,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
config UART_FOR_CONSOLE
int
default 2
default 0
config EARLY_PCI_BRIDGE_DEVICE
hex