mb/google/ocelot/var/matsu: Add overridetree
Add override devicetree per schematic_20251028. BUG=b:443612246 TEST=emerge-ocelot coreboot Change-Id: I0b527846ed455f46b9de1cd4bb4987aae85e0456 Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/89816 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Pranava Y N <pranavayn@google.com>
This commit is contained in:
Ivy Jian
Matt DeVillier
parent
05c0e16593
commit
82367b8205
1 changed files with 377 additions and 0 deletions
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@ -1,5 +1,382 @@
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chip soc/intel/pantherlake
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register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type C port - various configurations - TCP0
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register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type C port - various configurations - TCP1
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register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB Camera
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register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" # USB3.2 Gen1 x1 Type-A Port
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register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # USB FPS
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register "usb2_ports[6]" = "USB2_PORT_MID(OC0)" # USB3.2 Gen1 x1 Type-A Port
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register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # USB 3.2 Gen1 x1 Type-A Con - # 1
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # USB 3.2 Gen1 x1 Type-A Con - # 2
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register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
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register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
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register "tcss_cap_policy[0]" = "TCSS_TYPE_C_PORT_FULL_FUN"
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register "tcss_cap_policy[1]" = "TCSS_TYPE_C_PORT_FULL_FUN"
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# Enable EDP in PortA & HDMI in Port B
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register "ddi_port_A_config" = "1"
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register "ddi_port_B_config" = "1"
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register "ddi_ports_config" = "{
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[DDI_PORT_A] = DDI_ENABLE_HPD,
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[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
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}"
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register "serial_io_i2c_mode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoPci,
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoPci,
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}"
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register "serial_io_gspi_mode" = "{
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[PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
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[PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
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[PchSerialIoIndexGSPI0A] = PchSerialIoDisabled,
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}"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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#| I2C1 | TPM(cr50) |
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#| I2C4 | Touchpad |
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#| I2C5 | TouchScreen |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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/* Render OEM footer logo 100px above from the edge */
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.logo_bottom_margin = 100,
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.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
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.i2c[1] = {
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.speed = I2C_SPEED_FAST,
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.early_init = 1,
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},
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.i2c[4] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[5] = {
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.speed = I2C_SPEED_FAST,
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},
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}"
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device domain 0 on
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device ref igpu on
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chip drivers/gfx/generic
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register "device_count" = "4"
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# DDIA for eDP
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register "device[0].name" = ""LCD0""
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register "device[0].type" = "panel"
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# DDIB for HDMI
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# If HDMI is not enumerated in the kernel, then no GFX device should be added for DDIB
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register "device[1].name" = ""DD01""
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# TCP0 (DP-1) for port C0
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register "device[2].name" = ""DD02""
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register "device[2].use_pld" = "true"
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register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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# TCP1 (DP-2) for port C1
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register "device[3].name" = ""DD03""
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register "device[3].use_pld" = "true"
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register "device[3].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
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device generic 0 on end
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end
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end
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device ref dtt on
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chip drivers/intel/dptf
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## sensor information
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register "options.tsr[0].desc" = ""DDR_SOC""
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register "options.tsr[1].desc" = ""Ambient""
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register "options.tsr[2].desc" = ""Charger""
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## Active Policy
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# FIXME: below values are initial reference values only
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register "policies.active" = "{
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[0] = {
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.target = DPTF_TEMP_SENSOR_0,
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.thresholds = {
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TEMP_PCT(70, 97),
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TEMP_PCT(65, 90),
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TEMP_PCT(60, 80),
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TEMP_PCT(55, 75),
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TEMP_PCT(50, 65),
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TEMP_PCT(45, 45),
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TEMP_PCT(43, 30),
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}
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},
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[1] = {
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.target = DPTF_TEMP_SENSOR_1,
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.thresholds = {
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TEMP_PCT(70, 97),
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TEMP_PCT(65, 90),
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TEMP_PCT(60, 80),
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TEMP_PCT(55, 75),
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TEMP_PCT(50, 65),
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TEMP_PCT(45, 45),
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TEMP_PCT(43, 30),
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}
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},
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[2] = {
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.target = DPTF_TEMP_SENSOR_2,
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.thresholds = {
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TEMP_PCT(75, 90),
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TEMP_PCT(70, 80),
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TEMP_PCT(65, 70),
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TEMP_PCT(60, 50),
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}
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}
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}"
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## Passive Policy
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# TODO: below values are initial reference values only
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register "policies.passive" = "{
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[0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
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[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000),
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[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 5000),
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[3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
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}"
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## Critical Policy
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# TODO: below values are initial reference values only
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register "policies.critical" = "{
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[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
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[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
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[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
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[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
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}"
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## Power Limits Control
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register "controls.power_limits" = "{
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.pl1 = {
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.min_power = 12000,
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.max_power = 15000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 200,
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},
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.pl2 = {
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.min_power = 55000,
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.max_power = 55000,
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.time_window_min = 28 * MSECS_PER_SEC,
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.time_window_max = 32 * MSECS_PER_SEC,
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.granularity = 1000,
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}
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}"
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## Charger Performance Control (Control, mA)
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register "controls.charger_perf" = "{
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[0] = { 255, 3000 },
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[1] = { 24, 1500 },
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[2] = { 16, 1000 },
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[3] = { 8, 500 }
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}"
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## Fan Performance Control (Percent, Speed, Noise, Power)
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register "controls.fan_perf" = "{
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[0] = { 90, 6700, 220, 2200, },
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[1] = { 80, 5800, 180, 1800, },
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[2] = { 70, 5000, 145, 1450, },
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[3] = { 60, 4900, 115, 1150, },
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[4] = { 50, 3838, 90, 900, },
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[5] = { 40, 2904, 55, 550, },
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[6] = { 30, 2337, 30, 300, },
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[7] = { 20, 1608, 15, 150, },
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[8] = { 10, 800, 10, 100, },
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[9] = { 0, 0, 0, 50, }
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}"
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## Fan options
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register "options.fan.fine_grained_control" = "true"
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register "options.fan.step_size" = "2"
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device generic 0 alias dptf_policy on end
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end
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end
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device ref iaa off end
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device ref tbt_pcie_rp0 on end
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device ref tbt_pcie_rp1 on end
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device ref tcss_xhci on
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chip drivers/usb/acpi
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device ref tcss_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C0""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(4, 2)"
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device ref tcss_usb3_port0 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C1""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(3, 2)"
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device ref tcss_usb3_port1 on end
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end
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end
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end
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end
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device ref ish on
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chip drivers/intel/ish
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register "add_acpi_dma_property" = "true"
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device generic 0 on end
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end
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end
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device ref xhci on
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chip drivers/usb/acpi
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C0""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(1, 1)"
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C1""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(2, 1)"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Camera""
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register "type" = "UPC_TYPE_INTERNAL"
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register "has_power_resource" = "true"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C01)"
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device ref usb2_port3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port 2""
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register "type" = "UPC_TYPE_A"
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register "group" = "ACPI_PLD_GROUP(4, 1)"
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device ref usb2_port4 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 FPMCU""
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register "type" = "UPC_TYPE_INTERNAL"
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register "has_power_resource" = "true"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E05)"
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device ref usb2_port6 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port 1""
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register "type" = "UPC_TYPE_A"
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register "group" = "ACPI_PLD_GROUP(3, 1)"
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device ref usb2_port7 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port 1""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(3, 2)"
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device ref usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port 2""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(4, 2)"
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device ref usb3_port2 on end
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end
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end
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end
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end
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#ToDo: Probe using fw_config after decision.
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device ref ufs on end
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#ToDo: Probe using fw_config after decision.
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device ref pcie_rp1 on
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register "pcie_rp[PCIE_RP(1)]" = "{
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.clk_src = 3,
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.clk_req = 3,
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.flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,
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}"
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chip soc/intel/common/block/pcie/rtd3
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register "is_storage" = "true"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H18)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A08)"
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register "srcclk_pin" = "3"
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device generic 0 on end
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end
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end # Gen4 M.2 SSD
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device ref cnvi_wifi on
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chip drivers/wifi/generic
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register "wake" = "GPE0_PME_B0"
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register "add_acpi_dma_property" = "true"
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register "enable_cnvi_ddr_rfim" = "true"
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use cnvi_bluetooth as bluetooth_companion
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device generic 0 on end
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end
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end # CNVi
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device ref cnvi_bluetooth on end
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# NOTE: i2c0 is function 0; hence it needs to be enabled when any of i2c1-5 is enabled.
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# TPM device is under i2c1. Therefore, i2c0 needs to be enabled anyways.
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device ref i2c0 on end
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device ref i2c1 on
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chip drivers/i2c/tpm
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register "hid" = ""GOOG0005""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E14_IRQ)"
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device i2c 50 on end
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end
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end
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device ref i2c4 on
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chip drivers/i2c/hid
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register "generic.hid" = ""PIXA2305""
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register "generic.desc" = ""PIXA Touchpad""
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register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E18_IRQ)"
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# NOTE: pmc_gpe0_dw2 is GPP_E in baseboard devicetree.cb.
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register "generic.wake" = "GPE0_DW2_18"
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register "generic.detect" = "1"
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register "hid_desc_reg_offset" = "0x20"
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device i2c 68 on end
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end
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chip drivers/i2c/hid
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register "generic.hid" = ""PNP0C50""
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register "generic.desc" = ""Synaptics Touchpad""
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register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E18_IRQ)"
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register "generic.wake" = "GPE0_DW2_18"
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register "generic.detect" = "1"
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register "hid_desc_reg_offset" = "0x20"
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device i2c 2c on end
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end
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end # I2C4
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device ref i2c5 on
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chip drivers/i2c/hid
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register "generic.hid" = ""ELAN9004""
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register "generic.desc" = ""ELAN Touchscreen""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F16_IRQ)"
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register "generic.detect" = "1"
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register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F18)"
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register "generic.reset_delay_ms" = "150"
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register "generic.reset_off_delay_ms" = "2"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F08)"
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register "generic.enable_delay_ms" = "6"
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register "generic.enable_off_delay_ms" = "1"
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register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D19)"
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register "generic.stop_off_delay_ms" = "2"
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register "generic.has_power_resource" = "1"
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register "generic.use_gpio_for_status" = "true"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 0x10 on end
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end
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end # I2C5
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#ToDo: Probe using fw_config after decision.
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device ref hda on
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chip drivers/intel/soundwire
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device generic 0 on
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chip drivers/soundwire/alc711
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register "desc" = ""Headset Codec""
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register "alc711_address.version" = "SOUNDWIRE_VERSION_1_2"
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register "alc711_address.class" = "MIPI_CLASS_SDCA"
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register "alc711_address.part_id" = "MIPI_DEV_ID_REALTEK_ALC721"
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register "disable_clkstop_sm_support" = "true"
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# SoundWire Link 3 ID 1
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device generic 3.1 on end
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end
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end
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end
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end
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end
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end
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