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tegra124: clocks: Save some IOs in clock_enable_clear_reset.

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First, use the _set and _clr versions of the clk_enb and rst_dev registers to
avoid having to both read and write to clear or set bits. Also, check to see
if we're actually trying to set or clear bits before writing into those
registers.

BUG=None
TEST=Built and booted on Nyan.
BRANCH=None

Change-Id: If3e5a0401bef7888e6af6395dd480901d25fdf09
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/174845
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
This commit is contained in:
Gabe Black 2013-10-27 08:18:56 -07:00 • committed by chrome-internal-fetch
commit 81b977a275
1 changed files with 10 additions and 11 deletions
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21
src/soc/nvidia/tegra124/clock.c
View file

@ -327,19 +327,18 @@ void clock_init(void)
void clock_enable_clear_reset(u32 l, u32 h, u32 u, u32 v, u32 w)
{
/* TODO: can (should?) we use the _SET and _CLR registers here? */
setbits_le32(&clk_rst->clk_out_enb_l, l);
setbits_le32(&clk_rst->clk_out_enb_h, h);
setbits_le32(&clk_rst->clk_out_enb_u, u);
setbits_le32(&clk_rst->clk_out_enb_v, v);
setbits_le32(&clk_rst->clk_out_enb_w, w);
if (l) writel(l, &clk_rst->clk_enb_l_set);
if (h) writel(h, &clk_rst->clk_enb_h_set);
if (u) writel(u, &clk_rst->clk_enb_u_set);
if (v) writel(v, &clk_rst->clk_enb_v_set);
if (w) writel(w, &clk_rst->clk_enb_w_set);
/* Give clocks time to stabilize. */
udelay(IO_STABILIZATION_DELAY);
clrbits_le32(&clk_rst->rst_dev_l, l);
clrbits_le32(&clk_rst->rst_dev_h, h);
clrbits_le32(&clk_rst->rst_dev_u, u);
clrbits_le32(&clk_rst->rst_dev_v, v);
clrbits_le32(&clk_rst->rst_dev_w, w);
if (l) writel(l, &clk_rst->rst_dev_l_clr);
if (h) writel(h, &clk_rst->rst_dev_h_clr);
if (u) writel(u, &clk_rst->rst_dev_u_clr);
if (v) writel(v, &clk_rst->rst_dev_v_clr);
if (w) writel(w, &clk_rst->rst_dev_w_clr);
}