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mainboard/starlabs: move starlite under adl/

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Move StarLite Mk V (Lite ADL) into the ADL grouping under
src/mainboard/starlabs/adl/.

Like StarBook Horizon, keep common code in the ADL directory and place
model-specific data under src/mainboard/starlabs/adl/variants/ using the
SKU-style variant directory (i5).

Update MAINBOARD_DIR and related paths so binary blobs, SPD data and
CMOS layout continue to resolve correctly, and update documentation to
reflect the new blobs path.

Note that BUILD_TIMELESS ROM hashes change since MAINBOARD_DIR is
embedded in the CBFS config file.

BUG=None
TEST=BUILD_TIMELESS=1 build STARLABS_LITE_ADL
Change-Id: Ib367bc65ad63e848d9e20e7d55f542f135b3c1d5
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91256
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2026-02-15 21:20:09 +00:00
commit 7f02993393
39 changed files with 337 additions and 711 deletions
Download patch file Download diff file Expand all files Collapse all files

11
Documentation/mainboard/starlabs/lite_adl.md
View file

@ -1,4 +1,4 @@
# StarBook Mk V
# StarLite Mk V
## Specs
@ -33,7 +33,8 @@
## Building coreboot
Please follow the [Star Labs build instructions](common/building.md) to build coreboot, using `config.starlabs_starbook_adl` as config file.
Please follow the [Star Labs build instructions](common/building.md) to build
coreboot, using `config.starlabs_lite_adl` as config file.
### Preliminaries
@ -45,6 +46,10 @@ Prior to building coreboot the following files are required:
The files listed below are optional:
- Splash screen image in Windows 3.1 BMP format (Logo.bmp)
coreboot expects these binaries under
`3rdparty/blobs/mainboard/starlabs/adl/<variant>/`, where `<variant>`
matches `CONFIG_VARIANT_DIR` (default: `i5`).
These files exist in the correct location in the StarLabsLtd/blobs repo on GitHub which is used in place of the standard 3rdparty/blobs repo.
### Build
@ -53,7 +58,7 @@ The following commands will build a working image:
```bash
make distclean
make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_byte_adl
make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_lite_adl
make
```

46
src/mainboard/starlabs/adl/Kconfig
View file

@ -36,6 +36,17 @@ config BOARD_STARLABS_ADL_HORIZON
select SYSTEM_TYPE_LAPTOP
select TPM_MEASURED_BOOT
config BOARD_STARLABS_LITE_ADL
select BOARD_STARLABS_ADL_SERIES
select CRB_TPM
select DRIVERS_GFX_GENERIC
select DRIVERS_I2C_HID
select HAVE_HDA_DMIC
select HAVE_INTEL_PTT
select HAVE_SPD_IN_CBFS
select SOC_INTEL_ALDERLAKE_PCH_N
select SYSTEM_TYPE_DETACHABLE
config BOARD_STARLABS_BYTE_ADL
select BOARD_STARLABS_ADL_SERIES
select CRB_TPM
@ -92,16 +103,19 @@ config MAINBOARD_DIR
config MAINBOARD_FAMILY
string
default "HZ" if BOARD_STARLABS_ADL_HORIZON
default "I5" if BOARD_STARLABS_LITE_ADL
default "Y3" if BOARD_STARLABS_BYTE_TWL
default "Y2" if BOARD_STARLABS_BYTE_ADL
config MAINBOARD_PART_NUMBER
default "StarBook Horizon" if BOARD_STARLABS_ADL_HORIZON
default "StarLite Mk V" if BOARD_STARLABS_LITE_ADL
default "Byte Mk III" if BOARD_STARLABS_BYTE_TWL
default "Byte Mk II" if BOARD_STARLABS_BYTE_ADL
config MAINBOARD_SMBIOS_PRODUCT_NAME
default "StarBook Horizon" if BOARD_STARLABS_ADL_HORIZON
default "StarLite" if BOARD_STARLABS_LITE_ADL
default "Byte" if BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL
config ME_BIN_PATH
@ -122,41 +136,53 @@ config USE_PM_ACPI_TIMER
config VARIANT_DIR
default "hz" if BOARD_STARLABS_ADL_HORIZON
default "i5" if BOARD_STARLABS_LITE_ADL
default "y2" if BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL
config CMOS_LAYOUT_FILE
default "src/mainboard/\$(MAINBOARDDIR)/variants/\$(CONFIG_VARIANT_DIR)/cmos.layout"
if BOARD_STARLABS_ADL_HORIZON
if BOARD_STARLABS_ADL_HORIZON || BOARD_STARLABS_LITE_ADL
config CCD_PORT
int
default 4
default 4 if BOARD_STARLABS_ADL_HORIZON
default 5 if BOARD_STARLABS_LITE_ADL
config EC_STARLABS_BATTERY_MODEL
default "U5266122PV-2S1P"
default "U5266122PV-2S1P" if BOARD_STARLABS_ADL_HORIZON
default "AEC3756153-2S1P-N" if BOARD_STARLABS_LITE_ADL
config EC_STARLABS_BATTERY_TYPE
default "LION"
config EC_STARLABS_BATTERY_OEM
default "Shenzhen Utility Energy Co., Ltd"
default "Shenzhen Utility Energy Co., Ltd" if BOARD_STARLABS_ADL_HORIZON
default "Apower Electronics" if BOARD_STARLABS_LITE_ADL
if MAINBOARD_HAS_TPM2
config TPM_PIRQ
depends on MAINBOARD_HAS_TPM2
default 0x28
default 0x28 if BOARD_STARLABS_ADL_HORIZON
endif # BOARD_STARLABS_ADL_HORIZON
endif # MAINBOARD_HAS_TPM2
if BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL
endif # BOARD_STARLABS_ADL_HORIZON || BOARD_STARLABS_LITE_ADL
if BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL || BOARD_STARLABS_LITE_ADL
config PL4_WATTS
int
default 65
default 65 if BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL
default 37 if BOARD_STARLABS_LITE_ADL
config TJ_MAX
int
default 105 if BOARD_STARLABS_LITE_ADL
config VBOOT
select VBOOT_VBNV_FLASH
endif # BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL
endif # BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL || BOARD_STARLABS_LITE_ADL
endif # BOARD_STARLABS_ADL_SERIES

3
src/mainboard/starlabs/adl/Kconfig.name
View file

@ -8,3 +8,6 @@ config BOARD_STARLABS_BYTE_ADL
config BOARD_STARLABS_BYTE_TWL
bool "Star Labs Byte Mk III (N355)"
config BOARD_STARLABS_LITE_ADL
bool "Star Labs Lite Mk V (N200/N350)"

10
src/mainboard/starlabs/adl/acpi/mainboard.asl
View file

@ -3,3 +3,13 @@
Scope (\_SB) {
#include "sleep.asl"
}
#if CONFIG(BOARD_STARLABS_LITE_ADL)
Scope (_GPE)
{
Method (_E0F, 0, NotSerialized)
{
\_SB.PCI0.LPCB.EC.VBTN.UPDK()
}
}
#endif

190
src/mainboard/starlabs/adl/cfr.c
View file

@ -5,137 +5,176 @@
#include <drivers/option/cfr_frontend.h>
#include <ec/starlabs/merlin/cfr.h>
#include <intelblocks/cfr.h>
#if CONFIG(BOARD_STARLABS_LITE_ADL)
#include <device/i2c_bus.h>
#include <device/i2c_simple.h>
#include <option.h>
#include <static.h>
#include <variants.h>
#endif
#include <common/cfr.h>
#if CONFIG(BOARD_STARLABS_LITE_ADL)
void cfr_card_reader_update(struct sm_object *new_obj)
{
struct device *mxc_accel = DEV_PTR(mxc6655);
if (!i2c_dev_detect(i2c_busdev(mxc_accel), mxc_accel->path.i2c.device))
new_obj->sm_bool.flags = CFR_OPTFLAG_SUPPRESS;
}
void cfr_touchscreen_update(struct sm_object *new_obj)
{
if (get_uint_option("accelerometer", 1) == 0)
new_obj->sm_bool.flags = CFR_OPTFLAG_SUPPRESS;
}
#endif
#if CONFIG(SYSTEM_TYPE_LAPTOP) || CONFIG(SYSTEM_TYPE_DETACHABLE)
static struct sm_obj_form audio_video_group = {
.ui_name = "Audio/Video",
.obj_list = (const struct sm_object *[]){
&microphone,
&webcam,
NULL,
},
};
#endif
static struct sm_obj_form battery_group = {
.ui_name = "Battery",
.obj_list = (const struct sm_object *[]) {
#if CONFIG(SYSTEM_TYPE_LAPTOP)
&charging_speed,
&max_charge,
.obj_list =
(const struct sm_object *[]){
#if CONFIG(EC_STARLABS_CHARGING_SPEED)
&charging_speed,
#endif
&power_on_after_fail_bool,
NULL
},
#if CONFIG(SYSTEM_TYPE_LAPTOP) || CONFIG(SYSTEM_TYPE_DETACHABLE)
&max_charge,
#endif
&power_on_after_fail_bool, NULL},
};
static struct sm_obj_form debug_group = {
.ui_name = "Debug",
.obj_list = (const struct sm_object *[]) {
&debug_level,
NULL
},
.obj_list = (const struct sm_object *[]){&debug_level, NULL},
};
#if CONFIG(SYSTEM_TYPE_LAPTOP)
#if CONFIG(EC_STARLABS_POWER_LED) || CONFIG(EC_STARLABS_CHARGE_LED)
static struct sm_obj_form leds_group = {
.ui_name = "LEDs",
.obj_list = (const struct sm_object *[]) {
&charge_led,
&power_led,
NULL
},
.obj_list =
(const struct sm_object *[]){
#if CONFIG(EC_STARLABS_CHARGE_LED)
&charge_led,
#endif
#if CONFIG(EC_STARLABS_POWER_LED)
&power_led,
#endif
NULL, },
};
#endif
#if CONFIG(SYSTEM_TYPE_LAPTOP)
static struct sm_obj_form keyboard_group = {
.ui_name = "Keyboard",
.obj_list = (const struct sm_object *[]) {
&fn_ctrl_swap,
&kbl_timeout,
NULL
},
};
static struct sm_obj_form audio_video_group = {
.ui_name = "Audio/Video",
.obj_list = (const struct sm_object *[]) {
&microphone,
&webcam,
NULL
},
.obj_list = (const struct sm_object *[]){&fn_ctrl_swap, &kbl_timeout, NULL},
};
#endif
#if CONFIG(SYSTEM_TYPE_LAPTOP) || CONFIG(SYSTEM_TYPE_DETACHABLE)
static struct sm_obj_form display_group = {
.ui_name = "Display",
.obj_list = (const struct sm_object *[]) {
&display_native_res,
NULL
},
.obj_list =
(const struct sm_object *[]){
#if CONFIG(BOARD_STARLABS_LITE_ADL)
&accelerometer,
#endif
&display_native_res,
#if CONFIG(BOARD_STARLABS_LITE_ADL)
&touchscreen,
#endif
NULL, },
};
#endif
#if CONFIG(BOARD_STARLABS_LITE_ADL)
static struct sm_obj_form io_expansion_group = {
.ui_name = "I/O / Expansion",
.obj_list =
(const struct sm_object *[]){
&card_reader,
NULL, },
};
#endif
static struct sm_obj_form pcie_power_management_group = {
.ui_name = "PCIe Power Management",
.obj_list = (const struct sm_object *[]) {
&pciexp_aspm,
&pciexp_clk_pm,
&pciexp_l1ss,
NULL
},
.obj_list =
(const struct sm_object *[]){
#if CONFIG(SOC_INTEL_COMMON_BLOCK_ASPM)
&pciexp_aspm,
&pciexp_clk_pm,
&pciexp_l1ss,
#endif
NULL, },
};
static struct sm_obj_form performance_group = {
.ui_name = "Performance",
.obj_list = (const struct sm_object *[]) {
&fan_mode,
&gna,
#if CONFIG(SYSTEM_TYPE_LAPTOP)
&memory_speed,
.obj_list =
(const struct sm_object *[]){
#if CONFIG(EC_STARLABS_FAN)
&fan_mode,
#endif
&power_profile,
NULL
},
&gna,
#if CONFIG(SYSTEM_TYPE_LAPTOP) || CONFIG(SYSTEM_TYPE_DETACHABLE)
&memory_speed,
#endif
&power_profile, NULL},
};
static struct sm_obj_form security_group = {
.ui_name = "Security",
.obj_list = (const struct sm_object *[]) {
&bios_lock,
&intel_tme,
&me_state,
&me_state_counter,
NULL
},
.obj_list = (const struct sm_object *[]){&bios_lock, &intel_tme, &me_state,
&me_state_counter, NULL},
};
static struct sm_obj_form suspend_lid_group = {
.ui_name = "Suspend & Lid",
.obj_list = (const struct sm_object *[]) {
#if CONFIG(SYSTEM_TYPE_LAPTOP)
&lid_switch,
.obj_list =
(const struct sm_object *[]){
#if CONFIG(EC_STARLABS_LID_SWITCH)
&lid_switch,
#endif
&s0ix_enable,
NULL
},
&s0ix_enable, NULL},
};
static struct sm_obj_form virtualization_group = {
.ui_name = "Virtualization",
.obj_list = (const struct sm_object *[]) {
&vtd,
NULL
},
.obj_list = (const struct sm_object *[]){&vtd, NULL},
};
static struct sm_obj_form wireless_group = {
.ui_name = "Wireless",
.obj_list = (const struct sm_object *[]) {
&bluetooth,
&bluetooth_rtd3,
&wifi,
NULL
},
.obj_list = (const struct sm_object *[]){&bluetooth, &bluetooth_rtd3, &wifi, NULL},
};
static struct sm_obj_form *sm_root[] = {
#if CONFIG(SYSTEM_TYPE_LAPTOP)
#if CONFIG(SYSTEM_TYPE_LAPTOP) || CONFIG(SYSTEM_TYPE_DETACHABLE)
&audio_video_group,
#endif
&battery_group,
&debug_group,
#if CONFIG(SYSTEM_TYPE_LAPTOP)
#if CONFIG(SYSTEM_TYPE_LAPTOP) || CONFIG(SYSTEM_TYPE_DETACHABLE)
&display_group,
#endif
#if CONFIG(BOARD_STARLABS_LITE_ADL)
&io_expansion_group,
#endif
#if CONFIG(SYSTEM_TYPE_LAPTOP)
&keyboard_group,
#endif
#if CONFIG(EC_STARLABS_POWER_LED) || CONFIG(EC_STARLABS_CHARGE_LED)
&leds_group,
#endif
&pcie_power_management_group,
@ -144,8 +183,7 @@ static struct sm_obj_form *sm_root[] = {
&suspend_lid_group,
&virtualization_group,
&wireless_group,
NULL
};
NULL};
void mb_cfr_setup_menu(struct lb_cfr *cfr_root)
{

2
src/mainboard/starlabs/adl/dsdt.asl
View file

@ -22,7 +22,7 @@ DefinitionBlock(
#include <soc/intel/alderlake/acpi/tcss.asl>
#include <soc/intel/common/block/acpi/acpi/gna.asl>
#if CONFIG(SYSTEM_TYPE_LAPTOP)
#if CONFIG(SYSTEM_TYPE_LAPTOP) || CONFIG(SYSTEM_TYPE_DETACHABLE)
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
/* PS/2 Keyboard */

23
src/mainboard/starlabs/adl/mainboard.c
View file

@ -1,5 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#if CONFIG(BOARD_STARLABS_LITE_ADL)
#include <acpi/acpigen_ps2_keybd.h>
#include <commonlib/helpers.h>
#endif
#include <device/device.h>
#include <drivers/intel/gma/opregion.h>
#include <soc/ramstage.h>
@ -17,6 +22,24 @@ static void init_mainboard(void *chip_info)
devtree_update();
}
#if CONFIG(BOARD_STARLABS_LITE_ADL)
static void mainboard_fill_ssdt(const struct device *dev)
{
enum ps2_action_key ps2_action_keys[2] = {PS2_KEY_VOL_DOWN, PS2_KEY_VOL_UP};
acpigen_ps2_keyboard_dsd("_SB.PCI0.PS2K", ARRAY_SIZE(ps2_action_keys), ps2_action_keys,
false, false, false, false, false);
}
#endif
static void enable_mainboard(struct device *dev)
{
#if CONFIG(BOARD_STARLABS_LITE_ADL)
dev->ops->acpi_fill_ssdt = mainboard_fill_ssdt;
#endif
}
struct chip_operations mainboard_ops = {
.init = init_mainboard,
.enable_dev = enable_mainboard,
};

6
src/mainboard/starlabs/adl/spd/Makefile.mk
View file

@ -1,5 +1,11 @@
## SPDX-License-Identifier: GPL-2.0-only
ifeq ($(VARIANT_DIR),hz)
SPD_SOURCES = rs4g32l05d8fdb-5500
SPD_SOURCES += rs4g32l05d8fdb-6400
SPD_SOURCES += rs4g32l05d8fdb-7500
else ifeq ($(VARIANT_DIR),i5)
SPD_SOURCES = mt62f2g64d8-5500
SPD_SOURCES += mt62f2g64d8-6400
SPD_SOURCES += mt62f2g64d8-7500
endif

0
src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-5500.spd.hex → src/mainboard/starlabs/adl/spd/mt62f2g64d8-5500.spd.hex
View file

0
src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-6400.spd.hex → src/mainboard/starlabs/adl/spd/mt62f2g64d8-6400.spd.hex
View file

0
src/mainboard/starlabs/starlite_adl/spd/mt62f2g64d8-7500.spd.hex → src/mainboard/starlabs/adl/spd/mt62f2g64d8-7500.spd.hex
View file

0
src/mainboard/starlabs/starlite_adl/variants/mk_v/Makefile.mk → src/mainboard/starlabs/adl/variants/i5/Makefile.mk
View file

0
src/mainboard/starlabs/starlite_adl/variants/mk_v/board.fmd → src/mainboard/starlabs/adl/variants/i5/board.fmd
View file

0
src/mainboard/starlabs/starlite_adl/cmos.layout → src/mainboard/starlabs/adl/variants/i5/cmos.layout
View file

0
src/mainboard/starlabs/starlite_adl/variants/mk_v/data.vbt → src/mainboard/starlabs/adl/variants/i5/data.vbt
View file

0
src/mainboard/starlabs/starlite_adl/variants/mk_v/data_native_res.vbt → src/mainboard/starlabs/adl/variants/i5/data_native_res.vbt
View file

0
src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb → src/mainboard/starlabs/adl/variants/i5/devicetree.cb
View file

0
src/mainboard/starlabs/starlite_adl/variants/mk_v/devtree.c → src/mainboard/starlabs/adl/variants/i5/devtree.c
View file

117
src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c → src/mainboard/starlabs/adl/variants/i5/gpio.c
View file

@ -5,8 +5,8 @@
/* Early pad configuration in bootblock */
const struct pad_config early_gpio_table[] = {
/* Debug Connector */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* RXD */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* TXD */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* RXD */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* TXD */
};
const struct pad_config *variant_early_gpio_table(size_t *num)
@ -18,12 +18,12 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
/* Pad configuration in ramstage. */
const struct pad_config gpio_table[] = {
/* General Purpose I/O Deep */
PAD_CFG_NF(GPD0, NONE, DEEP, NF1), /* Battery Low */
PAD_CFG_NF(GPD1, NONE, DEEP, NF1), /* Charger Connected */
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1), /* Power Button */
PAD_CFG_NF(GPD4, NONE, DEEP, NF1), /* Sleep S3 */
PAD_CFG_NF(GPD5, NONE, DEEP, NF1), /* Sleep S4 */
PAD_CFG_NF(GPD8, NONE, DEEP, NF1), /* Bluetooth Suspend */
PAD_CFG_NF(GPD0, NONE, DEEP, NF1), /* Battery Low */
PAD_CFG_NF(GPD1, NONE, DEEP, NF1), /* Charger Connected */
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1), /* Power Button */
PAD_CFG_NF(GPD4, NONE, DEEP, NF1), /* Sleep S3 */
PAD_CFG_NF(GPD5, NONE, DEEP, NF1), /* Sleep S4 */
PAD_CFG_NF(GPD8, NONE, DEEP, NF1), /* Bluetooth Suspend */
/* eSPI - Configure automatically on reset */
// PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A0, UP_20K, DEEP, NF1), /* eSPI IO 0 */
@ -35,74 +35,75 @@ const struct pad_config gpio_table[] = {
// PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A10, NONE, DEEP, NF1), /* eSPI Reset */
/* Touchpanel */
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF2), /* Data */
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF2), /* Clock */
PAD_CFG_GPI_APIC_LOW(GPP_E12, NONE, PLTRST), /* Interrupt */
PAD_CFG_GPO(GPP_F17, 1, PLTRST), /* Reset */
PAD_CFG_GPI_APIC(GPP_F18, NONE, PLTRST, LEVEL, INVERT), /* Interrupt */
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF2), /* Data */
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF2), /* Clock */
PAD_CFG_GPI_APIC_LOW(GPP_E12, NONE, PLTRST), /* Interrupt */
PAD_CFG_GPO(GPP_F17, 1, PLTRST), /* Reset */
PAD_CFG_GPI_APIC(GPP_F18, NONE, PLTRST, LEVEL, INVERT), /* Interrupt */
/* Accelerometer */
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), /* Data */
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), /* Data */
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), /* Clock */
/* Keyboard */
PAD_CFG_GPI_SMI_LOW(GPP_F15, NONE, DEEP, EDGE_BOTH), /* Detect */
PAD_CFG_GPI_SMI_LOW(GPP_F15, NONE, DEEP, EDGE_BOTH), /* Detect */
/* SSD */
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* Clock Request 0 */
PAD_CFG_GPO(GPP_H0, 1, PLTRST), /* Reset */
PAD_CFG_GPO(GPP_D16, 1, DEEP), /* Enable */
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* Clock Request 0 */
PAD_CFG_GPO(GPP_H0, 1, PLTRST), /* Reset */
PAD_CFG_GPO(GPP_D16, 1, DEEP), /* Enable */
/* Wireless */
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), /* BRI Data */
PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1), /* BRI Response */
PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1), /* RGI Data */
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1), /* RGI Response */
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* RF Reset */
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2), /* Modem Clock Request */
PAD_CFG_GPO(GPP_E3, 1, DEEP), /* WiFi RF Kill */
PAD_CFG_GPO(GPP_A13, 1, DEEP), /* Bluetooth RF Kill */
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), /* BRI Data */
PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1), /* BRI Response */
PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1), /* RGI Data */
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1), /* RGI Response */
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* RF Reset */
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2), /* Modem Clock Request */
PAD_CFG_GPO(GPP_E3, 1, DEEP), /* WiFi RF Kill */
PAD_CFG_GPO(GPP_A13, 1, DEEP), /* Bluetooth RF Kill */
/* Display */
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* eDP Hot Plug */
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* HDMI Hot Plug */
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), /* HDMI Clock */
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), /* HDMI Data */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* TCP0 Hot Plug */
PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), /* TCP0 Hot Plug */
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* eDP Hot Plug */
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* HDMI Hot Plug */
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1), /* HDMI Clock */
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), /* HDMI Data */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* TCP0 Hot Plug */
PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), /* TCP0 Hot Plug */
/* High-Definition Audio */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), /* Data Output */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), /* Data Input */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1), /* Reset */
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), /* Data Output */
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), /* Data Input */
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1), /* Reset */
/* PCH */
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* C10 Gate */
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* Platform Reset */
PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), /* Vendor ID 0 */
PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), /* Vendor ID 1 */
PAD_CFG_GPI_SCI(GPP_B2, NONE, PLTRST, EDGE_SINGLE, INVERT), /* Processor Hot */
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* C10 Gate */
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* Platform Reset */
PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), /* Vendor ID 0 */
PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), /* Vendor ID 1 */
PAD_CFG_GPI_SCI(GPP_B2, NONE, PLTRST, EDGE_SINGLE, INVERT), /* Processor Hot */
/* SMBus */
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* Data */
PAD_CFG_GPO(GPP_E8, 1, DEEP), /* DRAM Sleep */
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* Clock */
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* Data */
PAD_CFG_GPO(GPP_E8, 1, DEEP), /* DRAM Sleep */
/* Config Straps [ Low / High ] */
PAD_CFG_GPO(GPP_B14, 0, PLTRST), /* Top Swap [ Disabled / Enabled ] */
PAD_CFG_GPO(GPP_B18, 0, PLTRST), /* Reboot Support [ Enabled / Disabled ] */
PAD_CFG_GPO(GPP_C2, 1, PLTRST), /* TLS Confidentiality [ Disabled / Enabled ] */
PAD_CFG_GPO(GPP_C5, 0, PLTRST), /* eSPI [ Enabled / Disabled ] */
PAD_CFG_GPO(GPP_E6, 0, PLTRST), /* JTAG ODT [ Disabled / Enabled ] */
PAD_CFG_GPO(GPP_H1, 0, PLTRST), /* BFX Strap 2 Bit 3 [ Disabled / Enabled ] */
PAD_CFG_GPO(GPP_E19, 0, PLTRST), /* TBT LSX #0 [ 1.8V / 3.3V ] */
PAD_CFG_GPO(GPP_E21, 0, PLTRST), /* TBT LSX #1 [ 1.8V / 3.3V ] */
PAD_CFG_GPO(GPP_D10, 0, PLTRST), /* TBT LSX #2 [ 1.8V / 3.3V ] */
PAD_CFG_GPO(GPP_D12, 0, PLTRST), /* TBT LSX #3 [ 1.8V / 3.3V ] */
PAD_CFG_GPO(GPP_F7, 0, PLTRST), /* MCRO LDO [ Disabled / Bypass ] */
PAD_CFG_GPO(GPD7, 0, PLTRST), /* RTC Clock Delay [ Disabled / 95ms ] */
PAD_CFG_GPO(GPP_B14, 0, PLTRST), /* Top Swap [ Disabled / Enabled ] */
PAD_CFG_GPO(GPP_B18, 0, PLTRST), /* Reboot Support [ Enabled / Disabled ] */
PAD_CFG_GPO(GPP_C2, 1, PLTRST), /* TLS Confidentiality [ Disabled / Enabled ] */
PAD_CFG_GPO(GPP_C5, 0,
PLTRST), /* eSPI [ Enabled / Disabled ] */
PAD_CFG_GPO(GPP_E6, 0, PLTRST), /* JTAG ODT [ Disabled / Enabled ] */
PAD_CFG_GPO(GPP_H1, 0, PLTRST), /* BFX Strap 2 Bit 3 [ Disabled / Enabled ] */
PAD_CFG_GPO(GPP_E19, 0, PLTRST), /* TBT LSX #0 [ 1.8V / 3.3V ] */
PAD_CFG_GPO(GPP_E21, 0, PLTRST), /* TBT LSX #1 [ 1.8V / 3.3V ] */
PAD_CFG_GPO(GPP_D10, 0, PLTRST), /* TBT LSX #2 [ 1.8V / 3.3V ] */
PAD_CFG_GPO(GPP_D12, 0, PLTRST), /* TBT LSX #3 [ 1.8V / 3.3V ] */
PAD_CFG_GPO(GPP_F7, 0, PLTRST), /* MCRO LDO [ Disabled / Bypass ] */
PAD_CFG_GPO(GPD7, 0, PLTRST), /* RTC Clock Delay [ Disabled / 95ms ] */
PAD_NC(GPD2, NONE),
PAD_NC(GPD6, NONE),

77
src/mainboard/starlabs/adl/variants/i5/hda_verb.c Normal file
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@ -0,0 +1,77 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/azalia_device.h>
#include <device/azalia_codec/realtek.h>
const u32 cim_verb_data[] = {
/* coreboot specific header */
0x10ec0269, /* Codec Vendor / Device ID: Realtek ALC269 */
0x1e507038, /* Subsystem ID */
18, /* Number of jacks (NID entries) */
/* Reset Codec First */
AZALIA_RESET(0x1),
/* HDA Codec Subsystem ID */
AZALIA_SUBVENDOR(0, 0x1e507038),
/* Pin Widget Verb-table */
AZALIA_PIN_CFG(0, ALC269_DMIC12,
AZALIA_PIN_DESC(AZALIA_INTEGRATED, AZALIA_INTERNAL | AZALIA_FRONT,
AZALIA_MIC_IN, AZALIA_OTHER_DIGITAL,
AZALIA_COLOR_UNKNOWN, AZALIA_NO_JACK_PRESENCE_DETECT, 3,
0)),
AZALIA_PIN_CFG(0, ALC269_SPEAKERS,
AZALIA_PIN_DESC(AZALIA_INTEGRATED, AZALIA_INTERNAL | AZALIA_FRONT,
AZALIA_SPEAKER, AZALIA_OTHER_ANALOG,
AZALIA_COLOR_UNKNOWN, AZALIA_NO_JACK_PRESENCE_DETECT, 1,
0)),
AZALIA_PIN_CFG(0, ALC269_VC_HP_OUT,
AZALIA_PIN_DESC(AZALIA_JACK,
AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT,
AZALIA_HP_OUT, AZALIA_STEREO_MONO_1_8, AZALIA_BLACK,
AZALIA_JACK_PRESENCE_DETECT, 2, 0)),
AZALIA_PIN_CFG(0, ALC269_MIC1,
AZALIA_PIN_DESC(AZALIA_JACK,
AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT,
AZALIA_MIC_IN, AZALIA_STEREO_MONO_1_8, AZALIA_BLACK,
AZALIA_JACK_PRESENCE_DETECT, 4, 0)),
AZALIA_PIN_CFG(0, ALC269_MONO, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_MIC2, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_LINE1, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_LINE2, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_PC_BEEP, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_SPDIF_OUT, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_VB_HP_OUT, AZALIA_PIN_CFG_NC(0)),
/* ALC269 Default 1 */
0x02050018,
0x02040184,
0x0205001c,
0x02044800,
/* ALC269 Default 2 */
0x02050024,
0x02040000,
0x02050004,
0x02040080,
/* ALC269 Default 3 */
0x02050008,
0x02040000,
0x0205000c,
0x02043f00,
/* ALC269 Default 4 */
0x02050015,
0x02048002,
0x02050015,
0x02048002,
/* Widget 0x0c */
0x00c37080,
0x00270610,
0x00d37080,
0x00370610,
};
const u32 pc_beep_verbs[] = {};
AZALIA_ARRAY_SIZES;

0
src/mainboard/starlabs/starlite_adl/variants/mk_v/ramstage.c → src/mainboard/starlabs/adl/variants/i5/ramstage.c
View file

0
src/mainboard/starlabs/starlite_adl/variants/mk_v/romstage.c → src/mainboard/starlabs/adl/variants/i5/romstage.c
View file

0
src/mainboard/starlabs/starlite_adl/variants/mk_v/vboot.fmd → src/mainboard/starlabs/adl/variants/i5/vboot.fmd
View file

123
src/mainboard/starlabs/starlite_adl/Kconfig
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@ -1,123 +0,0 @@
config BOARD_STARLABS_STARLITE_SERIES
def_bool n
select AZALIA_USE_LEGACY_VERB_TABLE
select BOARD_ROMSIZE_KB_16384
select CRB_TPM
select CSE_DEFAULT_CFR_OPTION_STATE_DISABLED
select DRIVERS_EFI_VARIABLE_STORE
select DRIVERS_GFX_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_INTEL_PMC
select DRIVERS_OPTION_CFR_ENABLED
select EC_STARLABS_MERLIN
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_HDA_DMIC
select HAVE_INTEL_PTT
select HAVE_OPTION_TABLE
select HAVE_SPD_IN_CBFS
select INTEL_GMA_HAVE_VBT
select INTEL_LPSS_UART_FOR_CONSOLE
select NO_UART_ON_SUPERIO
select PMC_IPC_ACPI_INTERFACE
select SOC_INTEL_ALDERLAKE
select SOC_INTEL_ALDERLAKE_PCH_N
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_COMMON_BLOCK_TCSS
select SOC_INTEL_CRASHLOG
select SPD_READ_BY_WORD
select SPI_FLASH_WINBOND
select SYSTEM_TYPE_DETACHABLE
select TPM2
select VALIDATE_INTEL_DESCRIPTOR
config BOARD_STARLABS_LITE_ADL
select BOARD_STARLABS_STARLITE_SERIES
if BOARD_STARLABS_STARLITE_SERIES
config CCD_PORT
int
default 5
config CONSOLE_SERIAL
default n if !EDK2_DEBUG
config D3COLD_SUPPORT
default n
config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config DIMM_SPD_SIZE
default 512
config EC_STARLABS_BATTERY_MODEL
default "AEC3756153-2S1P-N"
config EC_STARLABS_BATTERY_TYPE
default "LION"
config EC_STARLABS_BATTERY_OEM
default "Apower Electronics"
config EC_STARLABS_ITE_BIN_PATH
string
default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/\$(CONFIG_VARIANT_DIR)/ec.bin"
config FMDFILE
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/vboot.fmd" if VBOOT
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/board.fmd"
config IFD_BIN_PATH
string
default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/\$(CONFIG_VARIANT_DIR)/flashdescriptor.bin"
config MAINBOARD_DIR
default "starlabs/starlite_adl"
config MAINBOARD_FAMILY
string
default "I5"
config MAINBOARD_PART_NUMBER
default "StarLite Mk V"
config MAINBOARD_SMBIOS_PRODUCT_NAME
default "StarLite"
config ME_BIN_PATH
string
default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/\$(CONFIG_VARIANT_DIR)/intel_me.bin"
config POWER_STATE_DEFAULT_ON_AFTER_FAILURE
default n
config EDK2_BOOTSPLASH_FILE
string
default "3rdparty/blobs/mainboard/starlabs/Logo.bmp"
config SOC_INTEL_CSE_SEND_EOP_EARLY
default n
config TJ_MAX
int
default 105
config PL4_WATTS
int
default 37
config UART_FOR_CONSOLE
default 0
config USE_PM_ACPI_TIMER
default n
config VBOOT
select VBOOT_VBNV_FLASH
config VARIANT_DIR
default "mk_v"
endif

4
src/mainboard/starlabs/starlite_adl/Kconfig.name
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@ -1,4 +0,0 @@
comment "Star Labs StarLite Series"
config BOARD_STARLABS_LITE_ADL
bool "Star Labs Lite Mk V (N200/N355)"

14
src/mainboard/starlabs/starlite_adl/Makefile.mk
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@ -1,14 +0,0 @@
## SPDX-License-Identifier: GPL-2.0-only
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
subdirs-$(CONFIG_HAVE_SPD_IN_CBFS) += ./spd
subdirs-y += variants/$(VARIANT_DIR)
bootblock-y += bootblock.c
verstage-$(CONFIG_VBOOT) += vboot.c
romstage-$(CONFIG_VBOOT) += vboot.c
ramstage-$(CONFIG_DRIVERS_OPTION_CFR) += cfr.c
ramstage-y += mainboard.c

1
src/mainboard/starlabs/starlite_adl/acpi/ec.asl
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@ -1 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */

13
src/mainboard/starlabs/starlite_adl/acpi/mainboard.asl
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@ -1,13 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
Scope (\_SB) {
#include "sleep.asl"
}
Scope (_GPE)
{
Method (_E0F, 0, NotSerialized)
{
\_SB.PCI0.LPCB.EC.VBTN.UPDK()
}
}

11
src/mainboard/starlabs/starlite_adl/acpi/sleep.asl
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@ -1,11 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
Method (MPTS, 1, NotSerialized)
{
RPTS (Arg0)
}
Method (MWAK, 1, NotSerialized)
{
RWAK (Arg0)
}

1
src/mainboard/starlabs/starlite_adl/acpi/superio.asl
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@ -1 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */

6
src/mainboard/starlabs/starlite_adl/board_info.txt
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@ -1,6 +0,0 @@
Vendor name: Star Labs
Board name: StarLite
Category: laptop
ROM protocol: SPI
ROM socketed: n
Flashrom support: y

14
src/mainboard/starlabs/starlite_adl/bootblock.c
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@ -1,14 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
#include <soc/gpio.h>
#include <variants.h>
void bootblock_mainboard_init(void)
{
const struct pad_config *pads;
size_t num;
pads = variant_early_gpio_table(&num);
gpio_configure_pads(pads, num);
}

169
src/mainboard/starlabs/starlite_adl/cfr.c
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@ -1,169 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <boot/coreboot_tables.h>
#include <console/cfr.h>
#include <drivers/option/cfr_frontend.h>
#include <ec/starlabs/merlin/cfr.h>
#include <intelblocks/cfr.h>
#include <device/i2c_bus.h>
#include <device/i2c_simple.h>
#include <option.h>
#include <static.h>
#include <variants.h>
#include <common/cfr.h>
void cfr_card_reader_update(struct sm_object *new_obj)
{
struct device *mxc_accel = DEV_PTR(mxc6655);
if (!i2c_dev_detect(i2c_busdev(mxc_accel), mxc_accel->path.i2c.device))
new_obj->sm_bool.flags = CFR_OPTFLAG_SUPPRESS;
}
void cfr_touchscreen_update(struct sm_object *new_obj)
{
if (get_uint_option("accelerometer", 1) == 0)
new_obj->sm_bool.flags = CFR_OPTFLAG_SUPPRESS;
}
static struct sm_obj_form audio_video_group = {
.ui_name = "Audio/Video",
.obj_list = (const struct sm_object *[]) {
&microphone,
&webcam,
NULL
},
};
static struct sm_obj_form battery_group = {
.ui_name = "Battery",
.obj_list = (const struct sm_object *[]) {
#if CONFIG(EC_STARLABS_CHARGING_SPEED)
&charging_speed,
#endif
&max_charge,
&power_on_after_fail_bool,
NULL
},
};
static struct sm_obj_form debug_group = {
.ui_name = "Debug",
.obj_list = (const struct sm_object *[]) {
&debug_level,
NULL
},
};
static struct sm_obj_form display_group = {
.ui_name = "Display",
.obj_list = (const struct sm_object *[]) {
&accelerometer,
&display_native_res,
&touchscreen,
NULL
},
};
static struct sm_obj_form io_expansion_group = {
.ui_name = "I/O / Expansion",
.obj_list = (const struct sm_object *[]) {
&card_reader,
NULL
},
};
static struct sm_obj_form leds_group = {
.ui_name = "LEDs",
.obj_list = (const struct sm_object *[]) {
&charge_led,
&power_led,
NULL
},
};
static struct sm_obj_form pcie_power_management_group = {
.ui_name = "PCIe Power Management",
.obj_list = (const struct sm_object *[]) {
#if CONFIG(SOC_INTEL_COMMON_BLOCK_ASPM)
&pciexp_aspm,
&pciexp_clk_pm,
&pciexp_l1ss,
#endif
NULL
},
};
static struct sm_obj_form performance_group = {
.ui_name = "Performance",
.obj_list = (const struct sm_object *[]) {
#if CONFIG(SOC_INTEL_TIGERLAKE) || CONFIG(SOC_INTEL_ALDERLAKE) || CONFIG(SOC_INTEL_RAPTORLAKE)
&gna,
#endif
&memory_speed,
&power_profile,
NULL
},
};
static struct sm_obj_form security_group = {
.ui_name = "Security",
.obj_list = (const struct sm_object *[]) {
&bios_lock,
&intel_tme,
&me_state,
&me_state_counter,
NULL
},
};
static struct sm_obj_form suspend_lid_group = {
.ui_name = "Suspend & Lid",
.obj_list = (const struct sm_object *[]) {
#if CONFIG(EC_STARLABS_LID_SWITCH)
&lid_switch,
#endif
&s0ix_enable,
NULL
},
};
static struct sm_obj_form virtualization_group = {
.ui_name = "Virtualization",
.obj_list = (const struct sm_object *[]) {
&vtd,
NULL
},
};
static struct sm_obj_form wireless_group = {
.ui_name = "Wireless",
.obj_list = (const struct sm_object *[]) {
&bluetooth,
&bluetooth_rtd3,
&wifi,
NULL
},
};
static struct sm_obj_form *sm_root[] = {
&audio_video_group,
&battery_group,
&debug_group,
&display_group,
&io_expansion_group,
&leds_group,
&pcie_power_management_group,
&performance_group,
&security_group,
&suspend_lid_group,
&virtualization_group,
&wireless_group,
NULL
};
void mb_cfr_setup_menu(struct lb_cfr *cfr_root)
{
starlabs_cfr_register_overrides();
cfr_write_setup_menu(cfr_root, sm_root);
}

47
src/mainboard/starlabs/starlite_adl/dsdt.asl
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@ -1,47 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
DefinitionBlock(
"dsdt.aml",
"DSDT",
ACPI_DSDT_REV_2,
OEM_ID,
ACPI_TABLE_CREATOR,
0x20220930
)
{
#include <acpi/dsdt_top.asl>
#include <soc/intel/common/block/acpi/acpi/platform.asl>
#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
#include <cpu/intel/common/acpi/cpu.asl>
Device (\_SB.PCI0)
{
#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/alderlake/acpi/southbridge.asl>
#include <soc/intel/alderlake/acpi/tcss.asl>
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
#include <soc/intel/common/block/acpi/acpi/gna.asl>
/* PS/2 Keyboard */
#include <drivers/pc80/pc/ps2_controller.asl>
}
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Star Labs EC */
#include <ec/starlabs/merlin/acpi/ec.asl>
Scope (\_SB)
{
/* HID Driver */
#include <ec/starlabs/merlin/acpi/hid.asl>
/* Suspend Methods */
#include <ec/starlabs/merlin/acpi/suspend.asl>
}
#include "acpi/mainboard.asl"
}

17
src/mainboard/starlabs/starlite_adl/include/variants.h
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@ -1,17 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _BASEBOARD_VARIANTS_H_
#define _BASEBOARD_VARIANTS_H_
#include <soc/gpio.h>
/*
* The next set of functions return the gpio table and fill in the number of
* entries for each table.
*/
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
void devtree_update(void);
#endif /* _BASEBOARD_VARIANTS_H_ */

32
src/mainboard/starlabs/starlite_adl/mainboard.c
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@ -1,32 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen_ps2_keybd.h>
#include <device/device.h>
#include <soc/ramstage.h>
#include <variants.h>
static void init_mainboard(void *chip_info)
{
const struct pad_config *pads;
size_t num;
pads = variant_gpio_table(&num);
gpio_configure_pads(pads, num);
}
static void mainboard_fill_ssdt(const struct device *dev)
{
enum ps2_action_key ps2_action_keys[2] = {PS2_KEY_VOL_DOWN, PS2_KEY_VOL_UP};
acpigen_ps2_keyboard_dsd("_SB.PCI0.PS2K", ARRAY_SIZE(ps2_action_keys), ps2_action_keys,
false, false, false, false, false);
}
static void enable_mainboard(struct device *dev)
{
dev->ops->acpi_fill_ssdt = mainboard_fill_ssdt;
}
struct chip_operations mainboard_ops = {
.init = init_mainboard,
.enable_dev = enable_mainboard,
};

5
src/mainboard/starlabs/starlite_adl/spd/Makefile.mk
View file

@ -1,5 +0,0 @@
## SPDX-License-Identifier: GPL-2.0-only
SPD_SOURCES = mt62f2g64d8-5500
SPD_SOURCES += mt62f2g64d8-6400
SPD_SOURCES += mt62f2g64d8-7500

98
src/mainboard/starlabs/starlite_adl/variants/mk_v/hda_verb.c
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@ -1,98 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/azalia_device.h>
#include <device/azalia_codec/realtek.h>
const u32 cim_verb_data[] = {
/* coreboot specific header */
0x10ec0269, /* Codec Vendor / Device ID: Realtek ALC269 */
0x1e507038, /* Subsystem ID */
18, /* Number of jacks (NID entries) */
/* Reset Codec First */
AZALIA_RESET(0x1),
/* HDA Codec Subsystem ID */
AZALIA_SUBVENDOR(0, 0x1e507038),
/* Pin Widget Verb-table */
AZALIA_PIN_CFG(0, ALC269_DMIC12, AZALIA_PIN_DESC(
AZALIA_INTEGRATED,
AZALIA_INTERNAL | AZALIA_FRONT,
AZALIA_MIC_IN,
AZALIA_OTHER_DIGITAL,
AZALIA_COLOR_UNKNOWN,
AZALIA_NO_JACK_PRESENCE_DETECT,
3,
0
)),
AZALIA_PIN_CFG(0, ALC269_SPEAKERS, AZALIA_PIN_DESC(
AZALIA_INTEGRATED,
AZALIA_INTERNAL | AZALIA_FRONT,
AZALIA_SPEAKER,
AZALIA_OTHER_ANALOG,
AZALIA_COLOR_UNKNOWN,
AZALIA_NO_JACK_PRESENCE_DETECT,
1,
0
)),
AZALIA_PIN_CFG(0, ALC269_VC_HP_OUT, AZALIA_PIN_DESC(
AZALIA_JACK,
AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT,
AZALIA_HP_OUT,
AZALIA_STEREO_MONO_1_8,
AZALIA_BLACK,
AZALIA_JACK_PRESENCE_DETECT,
2,
0
)),
AZALIA_PIN_CFG(0, ALC269_MIC1, AZALIA_PIN_DESC(
AZALIA_JACK,
AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT,
AZALIA_MIC_IN,
AZALIA_STEREO_MONO_1_8,
AZALIA_BLACK,
AZALIA_JACK_PRESENCE_DETECT,
4,
0
)),
AZALIA_PIN_CFG(0, ALC269_MONO, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_MIC2, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_LINE1, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_LINE2, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_PC_BEEP, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_SPDIF_OUT, AZALIA_PIN_CFG_NC(0)),
AZALIA_PIN_CFG(0, ALC269_VB_HP_OUT, AZALIA_PIN_CFG_NC(0)),
/* ALC269 Default 1 */
0x02050018,
0x02040184,
0x0205001c,
0x02044800,
/* ALC269 Default 2 */
0x02050024,
0x02040000,
0x02050004,
0x02040080,
/* ALC269 Default 3 */
0x02050008,
0x02040000,
0x0205000c,
0x02043f00,
/* ALC269 Default 4 */
0x02050015,
0x02048002,
0x02050015,
0x02048002,
/* Widget 0x0c */
0x00c37080,
0x00270610,
0x00d37080,
0x00370610,
};
const u32 pc_beep_verbs[] = {
};
AZALIA_ARRAY_SIZES;

8
src/mainboard/starlabs/starlite_adl/vboot.c
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@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <bootmode.h>
int get_recovery_mode_switch(void)
{
return 0;
}