mainboard/starlabs: move Byte under adl/

Move the Star Labs Byte (Mk II / Mk III) into the ADL grouping under
src/mainboard/starlabs/adl/.

Like StarBook Horizon, model differences live under
src/mainboard/starlabs/adl/variants/ using SKU-style variant directories
to share common configuration. Byte Mk II (ADL) and Byte Mk III (TWL)
share a single "y2" variant directory.

Update MAINBOARD_DIR and CMOS layout handling so binary blob paths and
NVRAM options continue to resolve correctly.

Update the documentation to reflect the new blobs path.

Note that BUILD_TIMELESS ROM hashes change since MAINBOARD_DIR is
embedded in the CBFS config file.

BUG=None
TEST=BUILD_TIMELESS=1 build STARLABS_BYTE_ADL
Change-Id: I4b6be115a4ab2316d5ca4cc8e656e3643518273e
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91255
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2026-02-15 21:18:19 +00:00
commit e02dc13b87
34 changed files with 111 additions and 398 deletions

View file

@ -359,7 +359,7 @@ StarBook Mk VI <starlabs/starbook_adl.md>
StarBook Mk VII (N200) <starlabs/starbook_adl_n.md>
StarBook Mk VII (165H) <starlabs/starbook_mtl.md>
StarBook Horizon <starlabs/adl_horizon.md>
Byte Mk II <starlabs/byte_adl.md>
Byte Mk II <starlabs/byte.md>
StarFighter Mk I <starlabs/starfighter_rpl.md>
StarFighter Mk II <starlabs/starfighter_mtl.md>

View file

@ -34,7 +34,7 @@
## Building coreboot
Please follow the [Star Labs build instructions](common/building.md) to build coreboot, using `config.starlabs_byte_adl` as config file.
Please follow the [Star Labs build instructions](common/building.md) to build coreboot, using `config.starlabs_byte_adl` (Byte Mk II) or `config.starlabs_byte_twl` (Byte Mk III) as config file.
### Preliminaries
@ -46,6 +46,10 @@ Prior to building coreboot the following files are required:
The files listed below are optional:
- Splash screen image in Windows 3.1 BMP format (Logo.bmp)
coreboot expects these binaries under
`3rdparty/blobs/mainboard/starlabs/adl/<variant>/`, where `<variant>`
matches `CONFIG_VARIANT_DIR` (default: `y2`).
These files exist in the correct location in the StarLabsLtd/blobs repo on GitHub which is used in place of the standard 3rdparty/blobs repo.
### Build
@ -55,6 +59,8 @@ The following commands will build a working image:
```bash
make distclean
make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_byte_adl
# or
make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_byte_twl
make
```

View file

@ -1,23 +1,17 @@
config BOARD_STARLABS_ADL_SERIES
def_bool n
select AZALIA_USE_LEGACY_VERB_TABLE
select BOARD_ROMSIZE_KB_16384
select CSE_DEFAULT_CFR_OPTION_STATE_DISABLED
select DRIVERS_EFI_VARIABLE_STORE
select DRIVERS_GFX_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_INTEL_PMC
select DRIVERS_OPTION_CFR_ENABLED
select EC_STARLABS_MERLIN
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_CMOS_DEFAULT
select HAVE_HDA_DMIC
select HAVE_OPTION_TABLE
select HAVE_SPD_IN_CBFS
select INTEL_GMA_HAVE_VBT
select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_HAS_TPM2
select MEMORY_MAPPED_TPM
select NO_UART_ON_SUPERIO
select PMC_IPC_ACPI_INTERFACE
select SOC_INTEL_ALDERLAKE
@ -26,21 +20,43 @@ config BOARD_STARLABS_ADL_SERIES
select SOC_INTEL_CRASHLOG
select SPD_READ_BY_WORD
select SPI_FLASH_WINBOND
select SYSTEM_TYPE_LAPTOP
select TPM2
select TPM_MEASURED_BOOT
select VALIDATE_INTEL_DESCRIPTOR
config BOARD_STARLABS_ADL_HORIZON
select BOARD_ROMSIZE_KB_16384
select BOARD_STARLABS_ADL_SERIES
select DRIVERS_GFX_GENERIC
select DRIVERS_I2C_HID
select HAVE_CMOS_DEFAULT
select HAVE_HDA_DMIC
select HAVE_SPD_IN_CBFS
select MAINBOARD_HAS_TPM2
select MEMORY_MAPPED_TPM
select SOC_INTEL_ALDERLAKE_PCH_N
select SYSTEM_TYPE_LAPTOP
select TPM_MEASURED_BOOT
if BOARD_STARLABS_ADL_HORIZON
config BOARD_STARLABS_BYTE_ADL
select BOARD_STARLABS_ADL_SERIES
select CRB_TPM
select DRIVERS_PCIE_GENERIC
select EC_STARLABS_FAN
select HAVE_INTEL_PTT
select SOC_INTEL_ALDERLAKE_PCH_N
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
select SYSTEM_TYPE_MINIPC
config CCD_PORT
int
default 4
config BOARD_STARLABS_BYTE_TWL
select BOARD_STARLABS_ADL_SERIES
select CRB_TPM
select DRIVERS_PCIE_GENERIC
select EC_STARLABS_FAN
select HAVE_INTEL_PTT
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
select SOC_INTEL_TWINLAKE
select SYSTEM_TYPE_MINIPC
if BOARD_STARLABS_ADL_SERIES
config CONSOLE_SERIAL
default n if !EDK2_DEBUG
@ -58,20 +74,12 @@ config EDK2_BOOTSPLASH_FILE
string
default "3rdparty/blobs/mainboard/starlabs/Logo.bmp"
config EC_STARLABS_BATTERY_MODEL
default "U5266122PV-2S1P"
config EC_STARLABS_BATTERY_TYPE
default "LION"
config EC_STARLABS_BATTERY_OEM
default "Shenzhen Utility Energy Co., Ltd"
config EC_STARLABS_ITE_BIN_PATH
string
default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/\$(CONFIG_VARIANT_DIR)/ec.bin"
config FMDFILE
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/vboot.fmd" if VBOOT
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/board.fmd"
config IFD_BIN_PATH
@ -83,13 +91,18 @@ config MAINBOARD_DIR
config MAINBOARD_FAMILY
string
default "HZ"
default "HZ" if BOARD_STARLABS_ADL_HORIZON
default "Y3" if BOARD_STARLABS_BYTE_TWL
default "Y2" if BOARD_STARLABS_BYTE_ADL
config MAINBOARD_PART_NUMBER
default "StarBook Horizon"
default "StarBook Horizon" if BOARD_STARLABS_ADL_HORIZON
default "Byte Mk III" if BOARD_STARLABS_BYTE_TWL
default "Byte Mk II" if BOARD_STARLABS_BYTE_ADL
config MAINBOARD_SMBIOS_PRODUCT_NAME
default "StarBook Horizon"
default "StarBook Horizon" if BOARD_STARLABS_ADL_HORIZON
default "Byte" if BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL
config ME_BIN_PATH
string
@ -101,10 +114,6 @@ config POWER_STATE_DEFAULT_ON_AFTER_FAILURE
config SOC_INTEL_CSE_SEND_EOP_EARLY
default n
config TPM_PIRQ
depends on MAINBOARD_HAS_TPM2
default 0x28
config UART_FOR_CONSOLE
default 0
@ -112,6 +121,42 @@ config USE_PM_ACPI_TIMER
default n
config VARIANT_DIR
default "hz"
default "hz" if BOARD_STARLABS_ADL_HORIZON
default "y2" if BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL
endif
config CMOS_LAYOUT_FILE
default "src/mainboard/\$(MAINBOARDDIR)/variants/\$(CONFIG_VARIANT_DIR)/cmos.layout"
if BOARD_STARLABS_ADL_HORIZON
config CCD_PORT
int
default 4
config EC_STARLABS_BATTERY_MODEL
default "U5266122PV-2S1P"
config EC_STARLABS_BATTERY_TYPE
default "LION"
config EC_STARLABS_BATTERY_OEM
default "Shenzhen Utility Energy Co., Ltd"
config TPM_PIRQ
depends on MAINBOARD_HAS_TPM2
default 0x28
endif # BOARD_STARLABS_ADL_HORIZON
if BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL
config PL4_WATTS
int
default 65
config VBOOT
select VBOOT_VBNV_FLASH
endif # BOARD_STARLABS_BYTE_ADL || BOARD_STARLABS_BYTE_TWL
endif # BOARD_STARLABS_ADL_SERIES

View file

@ -1,4 +1,10 @@
comment "Star Labs StarLite Series"
comment "Star Labs ADL Series"
config BOARD_STARLABS_ADL_HORIZON
bool "Star Labs StarBook Horizon (N305)"
config BOARD_STARLABS_BYTE_ADL
bool "Star Labs Byte Mk II (N200)"
config BOARD_STARLABS_BYTE_TWL
bool "Star Labs Byte Mk III (N355)"

View file

@ -1,5 +1,5 @@
Vendor name: Star Labs
Board name: StarBook Horizon
Board name: ADL Series
Category: laptop
ROM protocol: SPI
ROM socketed: n

View file

@ -10,8 +10,10 @@
static struct sm_obj_form battery_group = {
.ui_name = "Battery",
.obj_list = (const struct sm_object *[]) {
#if CONFIG(SYSTEM_TYPE_LAPTOP)
&charging_speed,
&max_charge,
#endif
&power_on_after_fail_bool,
NULL
},
@ -25,6 +27,7 @@ static struct sm_obj_form debug_group = {
},
};
#if CONFIG(SYSTEM_TYPE_LAPTOP)
static struct sm_obj_form leds_group = {
.ui_name = "LEDs",
.obj_list = (const struct sm_object *[]) {
@ -59,6 +62,7 @@ static struct sm_obj_form display_group = {
NULL
},
};
#endif
static struct sm_obj_form pcie_power_management_group = {
.ui_name = "PCIe Power Management",
@ -75,7 +79,9 @@ static struct sm_obj_form performance_group = {
.obj_list = (const struct sm_object *[]) {
&fan_mode,
&gna,
#if CONFIG(SYSTEM_TYPE_LAPTOP)
&memory_speed,
#endif
&power_profile,
NULL
},
@ -95,7 +101,9 @@ static struct sm_obj_form security_group = {
static struct sm_obj_form suspend_lid_group = {
.ui_name = "Suspend & Lid",
.obj_list = (const struct sm_object *[]) {
#if CONFIG(SYSTEM_TYPE_LAPTOP)
&lid_switch,
#endif
&s0ix_enable,
NULL
},
@ -120,12 +128,16 @@ static struct sm_obj_form wireless_group = {
};
static struct sm_obj_form *sm_root[] = {
#if CONFIG(SYSTEM_TYPE_LAPTOP)
&audio_video_group,
#endif
&battery_group,
&debug_group,
#if CONFIG(SYSTEM_TYPE_LAPTOP)
&display_group,
&keyboard_group,
&leds_group,
#endif
&pcie_power_management_group,
&performance_group,
&security_group,

View file

@ -21,12 +21,13 @@ DefinitionBlock(
#include <soc/intel/alderlake/acpi/southbridge.asl>
#include <soc/intel/alderlake/acpi/tcss.asl>
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
#include <soc/intel/common/block/acpi/acpi/gna.asl>
#if CONFIG(SYSTEM_TYPE_LAPTOP)
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
/* PS/2 Keyboard */
#include <drivers/pc80/pc/ps2_controller.asl>
#endif
}
#include <southbridge/intel/common/acpi/sleepstates.asl>

View file

@ -2,6 +2,8 @@
bootblock-y += gpio.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
romstage-y += romstage.c
ramstage-y += devtree.c

View file

@ -86,7 +86,7 @@ const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* Data */
PAD_CFG_GPO(GPP_E8, 1, DEEP), /* DRAM Sleep */
/* Config Straps [ Low / High ] */
/* Config Straps [ Low / High ] */
PAD_CFG_GPO(GPP_B14, 0, PLTRST), /* Top Swap [ Disabled / Enabled ] */
PAD_CFG_GPO(GPP_B18, 0, PLTRST), /* Reboot Support [ Enabled / Disabled ] */
PAD_CFG_GPO(GPP_C2, 1, PLTRST), /* TLS Confidentiality [ Disabled / Enabled ] */

View file

@ -1,116 +0,0 @@
config BOARD_STARLABS_BYTE_SERIES
def_bool n
select AZALIA_USE_LEGACY_VERB_TABLE
select BOARD_ROMSIZE_KB_16384
select CRB_TPM
select CSE_DEFAULT_CFR_OPTION_STATE_DISABLED
select DRIVERS_EFI_VARIABLE_STORE
select DRIVERS_INTEL_PMC
select DRIVERS_OPTION_CFR_ENABLED
select DRIVERS_PCIE_GENERIC
select EC_STARLABS_FAN
select EC_STARLABS_MERLIN
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_INTEL_PTT
select HAVE_OPTION_TABLE
select INTEL_GMA_HAVE_VBT
select INTEL_LPSS_UART_FOR_CONSOLE
select NO_UART_ON_SUPERIO
select PMC_IPC_ACPI_INTERFACE
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_COMMON_BLOCK_TCSS
select SOC_INTEL_CRASHLOG
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
select SPD_READ_BY_WORD
select SPI_FLASH_WINBOND
select SYSTEM_TYPE_MINIPC
select TPM2
select VALIDATE_INTEL_DESCRIPTOR
config BOARD_STARLABS_BYTE_ADL
select BOARD_STARLABS_BYTE_SERIES
select SOC_INTEL_ALDERLAKE
select SOC_INTEL_ALDERLAKE_PCH_N
config BOARD_STARLABS_BYTE_TWL
select BOARD_STARLABS_BYTE_SERIES
select SOC_INTEL_ALDERLAKE
select SOC_INTEL_TWINLAKE
if BOARD_STARLABS_BYTE_SERIES
config CONSOLE_SERIAL
default n if !EDK2_DEBUG
config D3COLD_SUPPORT
default n
config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config DIMM_SPD_SIZE
default 512
config EC_STARLABS_ITE_BIN_PATH
string
default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/\$(CONFIG_VARIANT_DIR)/ec.bin"
config FMDFILE
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/vboot.fmd" if VBOOT
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/board.fmd"
config IFD_BIN_PATH
string
default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/\$(CONFIG_VARIANT_DIR)/flashdescriptor.bin"
config MAINBOARD_DIR
default "starlabs/byte_adl"
config MAINBOARD_FAMILY
string
default "Y3" if BOARD_STARLABS_BYTE_TWL
default "Y2"
config MAINBOARD_PART_NUMBER
default "Byte Mk III" if BOARD_STARLABS_BYTE_TWL
default "Byte Mk II"
config MAINBOARD_SMBIOS_PRODUCT_NAME
default "Byte"
config ME_BIN_PATH
string
default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/\$(CONFIG_VARIANT_DIR)/intel_me.bin"
config PL4_WATTS
int
default 65
config POWER_STATE_DEFAULT_ON_AFTER_FAILURE
default n
config EDK2_BOOTSPLASH_FILE
string
default "3rdparty/blobs/mainboard/starlabs/Logo.bmp"
config SOC_INTEL_CSE_SEND_EOP_EARLY
default n
config TJ_MAX
int
default 105
config UART_FOR_CONSOLE
default 0
config USE_PM_ACPI_TIMER
default n
config VBOOT
select VBOOT_VBNV_FLASH
config VARIANT_DIR
default "mk_ii"
endif

View file

@ -1,7 +0,0 @@
comment "Star Labs Byte Series"
config BOARD_STARLABS_BYTE_ADL
bool "Star Labs Byte Mk II (N200)"
config BOARD_STARLABS_BYTE_TWL
bool "Star Labs Byte Mk III (N355)"

View file

@ -1,13 +0,0 @@
## SPDX-License-Identifier: GPL-2.0-only
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
subdirs-y += variants/$(VARIANT_DIR)
bootblock-y += bootblock.c
verstage-$(CONFIG_VBOOT) += vboot.c
romstage-$(CONFIG_VBOOT) += vboot.c
ramstage-$(CONFIG_DRIVERS_OPTION_CFR) += cfr.c
ramstage-y += mainboard.c

View file

@ -1 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */

View file

@ -1,5 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
Scope (\_SB) {
#include "sleep.asl"
}

View file

@ -1,11 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
Method (MPTS, 1, NotSerialized)
{
RPTS (Arg0)
}
Method (MWAK, 1, NotSerialized)
{
RWAK (Arg0)
}

View file

@ -1 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */

View file

@ -1,6 +0,0 @@
Vendor name: Star Labs
Board name: Byte
Category: desktop
ROM protocol: SPI
ROM socketed: n
Flashrom support: y

View file

@ -1,14 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
#include <soc/gpio.h>
#include <variants.h>
void bootblock_mainboard_init(void)
{
const struct pad_config *pads;
size_t num;
pads = variant_early_gpio_table(&num);
gpio_configure_pads(pads, num);
}

View file

@ -1,100 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <boot/coreboot_tables.h>
#include <console/cfr.h>
#include <drivers/option/cfr_frontend.h>
#include <ec/starlabs/merlin/cfr.h>
#include <intelblocks/cfr.h>
#include <variants.h>
#include <common/cfr.h>
static struct sm_obj_form battery_group = {
.ui_name = "Battery",
.obj_list = (const struct sm_object *[]) {
&power_on_after_fail_bool,
NULL
},
};
static struct sm_obj_form debug_group = {
.ui_name = "Debug",
.obj_list = (const struct sm_object *[]) {
&debug_level,
NULL
},
};
static struct sm_obj_form pcie_power_management_group = {
.ui_name = "PCIe Power Management",
.obj_list = (const struct sm_object *[]) {
&pciexp_aspm,
&pciexp_clk_pm,
&pciexp_l1ss,
NULL
},
};
static struct sm_obj_form performance_group = {
.ui_name = "Performance",
.obj_list = (const struct sm_object *[]) {
&fan_mode,
&gna,
&power_profile,
NULL
},
};
static struct sm_obj_form security_group = {
.ui_name = "Security",
.obj_list = (const struct sm_object *[]) {
&bios_lock,
&intel_tme,
&me_state,
&me_state_counter,
NULL
},
};
static struct sm_obj_form suspend_lid_group = {
.ui_name = "Suspend & Lid",
.obj_list = (const struct sm_object *[]) {
&s0ix_enable,
NULL
},
};
static struct sm_obj_form virtualization_group = {
.ui_name = "Virtualization",
.obj_list = (const struct sm_object *[]) {
&vtd,
NULL
},
};
static struct sm_obj_form wireless_group = {
.ui_name = "Wireless",
.obj_list = (const struct sm_object *[]) {
&bluetooth,
&bluetooth_rtd3,
&wifi,
NULL
},
};
static struct sm_obj_form *sm_root[] = {
&battery_group,
&debug_group,
&pcie_power_management_group,
&performance_group,
&security_group,
&suspend_lid_group,
&virtualization_group,
&wireless_group,
NULL
};
void mb_cfr_setup_menu(struct lb_cfr *cfr_root)
{
starlabs_cfr_register_overrides();
cfr_write_setup_menu(cfr_root, sm_root);
}

View file

@ -1,42 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
DefinitionBlock(
"dsdt.aml",
"DSDT",
ACPI_DSDT_REV_2,
OEM_ID,
ACPI_TABLE_CREATOR,
0x20220930
)
{
#include <acpi/dsdt_top.asl>
#include <soc/intel/common/block/acpi/acpi/platform.asl>
#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
#include <cpu/intel/common/acpi/cpu.asl>
Device (\_SB.PCI0)
{
#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/alderlake/acpi/southbridge.asl>
#include <soc/intel/alderlake/acpi/tcss.asl>
#include <soc/intel/common/block/acpi/acpi/gna.asl>
}
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Star Labs EC */
#include <ec/starlabs/merlin/acpi/ec.asl>
Scope (\_SB)
{
/* HID Driver */
#include <ec/starlabs/merlin/acpi/hid.asl>
/* Suspend Methods */
#include <ec/starlabs/merlin/acpi/suspend.asl>
}
#include "acpi/mainboard.asl"
}

View file

@ -1,17 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef _BASEBOARD_VARIANTS_H_
#define _BASEBOARD_VARIANTS_H_
#include <soc/gpio.h>
/*
* The next set of functions return the gpio table and fill in the number of
* entries for each table.
*/
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
void devtree_update(void);
#endif /* _BASEBOARD_VARIANTS_H_ */

View file

@ -1,18 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/device.h>
#include <soc/ramstage.h>
#include <variants.h>
static void init_mainboard(void *chip_info)
{
const struct pad_config *pads;
size_t num;
pads = variant_gpio_table(&num);
gpio_configure_pads(pads, num);
}
struct chip_operations mainboard_ops = {
.init = init_mainboard,
};

View file

@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <bootmode.h>
int get_recovery_mode_switch(void)
{
return 0;
}