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UPSTREAM: intel/broadwell: Use the correct SATA port config for setting IOBP register

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Fix a typo that was introduce in commit 696ebc2d (Broadwell/Sata:
Add support for setting IOBP registers for Ports 2 and 3.) [1].

Setting one of the SATA port 3 IOBP setting was using the value from
the port 2 register.

On the purism/librem13 (on which SATA port 3 is tested), this change
doesn't seem to affect anything, as that typo wasn't exhibiting any
visible problems anyways.

[1] https://review.coreboot.org/18408

BUG=none
BRANCH=none
TEST=none

Change-Id: I872b03d4d4d28ae77d1cfe315da6a336c555817b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 601aa313a6
Original-Change-Id: I3948def5c0588791009c4b24cbc061552d9d1d48
Original-Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Original-Reviewed-on: https://review.coreboot.org/18514
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/449825
This commit is contained in:
Youness Alaoui 2017-02-27 12:03:39 -05:00 • committed by chrome-bot
commit 7e172ca4fd
1 changed files with 1 additions and 1 deletions
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2
src/soc/intel/broadwell/sata.c
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@ -161,7 +161,7 @@ static void sata_init(struct device *dev)
pch_iobp_update(SATA_IOBP_SP3_SECRT88,
~(SATA_SECRT88_VADJ_MASK <<
SATA_SECRT88_VADJ_SHIFT),
(config->sata_port2_gen3_tx &
(config->sata_port3_gen3_tx &
SATA_SECRT88_VADJ_MASK)
<< SATA_SECRT88_VADJ_SHIFT);