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soc/amd/common/psp_gen2: Add config for PSP MBOX offset

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Some SoC like Glinda use different PSP MBOX offset.
Add config to allow SoC Kconfig to override PSP MBOX offset.

Change-Id: Iefcc7d3b75689b43399a7a7b612417c155619211
Signed-off-by: Naresh Solanki <naresh.solanki@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85626
Reviewed-by: Ana Carolina Cabral
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Naresh Solanki 2024-11-20 14:55:48 +05:30 • committed by Felix Held
commit 7cd7db6991
2 changed files with 6 additions and 2 deletions
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4
src/soc/amd/common/block/psp/Kconfig
View file

@ -202,3 +202,7 @@ config USE_AMDFWTOOL
default y if SOC_AMD_COMMON_BLOCK_PSP
help
Select this if AMDFWTOOL needs to be built
config PSPV2_MBOX_CMD_OFFSET
hex
default 0x10570

4
src/soc/amd/common/block/psp/psp_gen2.c
View file

@ -8,8 +8,8 @@
#include <device/mmio.h>
#include "psp_def.h"
#define PSP_MAILBOX_COMMAND_OFFSET 0x10570 /* 4 bytes */
#define PSP_MAILBOX_BUFFER_OFFSET 0x10574 /* 8 bytes */
#define PSP_MAILBOX_COMMAND_OFFSET CONFIG_PSPV2_MBOX_CMD_OFFSET /* 4 bytes */
#define PSP_MAILBOX_BUFFER_OFFSET (CONFIG_PSPV2_MBOX_CMD_OFFSET + 4) /* 8 bytes */
#define IOHC_MISC_PSP_MMIO_REG 0x2e0