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soc/intel/pantherlake: Adding device id for Crashlog and Telemetry

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This patch adds device id for Crashlog and Telemetry. CPU crashlog
record is stored in punit SRAM.
Source: EDS 815002

BUG=None
TEST=Build fatcat and boot with Panther Lake SoC with added
device id.

Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Change-Id: I2959623986108a2c5e3dce16e892913a42d71755
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85372
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
This commit is contained in:
Sowmya Aralguppe 2024-11-29 20:08:04 +05:30 • committed by Matt DeVillier
commit 7c76021276
2 changed files with 2 additions and 0 deletions
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1
src/include/device/pci_ids.h
View file

@ -4934,6 +4934,7 @@
#define PCI_DID_INTEL_MTL_CRASHLOG_SRAM 0x7d0d
#define PCI_DID_INTEL_RPL_CPU_CRASHLOG_SRAM 0xa77d
#define PCI_DID_INTEL_RPP_S_PMC_CRASHLOG_SRAM 0x7a27
#define PCI_DID_INTEL_PTL_PUNIT_CRASHLOG_SRAM 0xb07d
/* Intel Trace Hub */
#define PCI_DID_INTEL_MTL_TRACEHUB 0x7e24

1
src/soc/intel/common/block/sram/sram.c
View file

@ -35,6 +35,7 @@ static const struct device_operations device_ops = {
static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_PTL_H_SRAM,
PCI_DID_INTEL_PTL_U_H_SRAM,
PCI_DID_INTEL_PTL_PUNIT_CRASHLOG_SRAM,
PCI_DID_INTEL_LNL_SRAM,
PCI_DID_INTEL_MTL_SOC_SRAM,
PCI_DID_INTEL_MTL_IOE_M_SRAM,