erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

soc/mediatek/mt8189: Enable MUXes for improved peripheral stability

Browse source 
Enabling the mem_sub_sel and emi_n_sel MUXes in coreboot ensures proper
connectivity for multiple peripheral modules. Without these MUXes
enabled, some devices may experience communication failures or system
instability.

BUG=b:379008996
BRANCH=none
TEST=build pass and driver init ok.

Signed-off-by: Irving-CH Lin <irving-ch.lin@mediatek.corp-partner.google.com>
Change-Id: I3ee0432ac1f102343e49a51008b3ea552b3f2857
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87974
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Irving-CH Lin 2025-05-26 13:52:22 +08:00 • committed by Yidi Lin
commit 7b1eac4192
1 changed files with 6 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

6
src/soc/mediatek/mt8189/pll.c
View file

@ -66,7 +66,9 @@ enum mux_id {
CLK_TOP_AUDIO_H_SEL,
CLK_TOP_MCUPM_SEL,
CLK_TOP_MEM_SUB_SEL,
CLK_TOP_MEM_SUB_PERI_SEL,
CLK_TOP_MEM_SUB_U_SEL,
CLK_TOP_EMI_N_SEL,
CLK_TOP_DXCC_SEL,
CLK_TOP_DP_SEL,
CLK_TOP_EDP_SEL,
@ -192,7 +194,9 @@ static const struct mux muxes[] = {
CKSYS_MUX_UPD(CLK_TOP_AUDIO_H_SEL, clk_cfg[12], 8, 2, clk_cfg_update[1], 18),
CKSYS_MUX_UPD(CLK_TOP_MCUPM_SEL, clk_cfg[12], 16, 2, clk_cfg_update[1], 19),
CKSYS_MUX_UPD(CLK_TOP_MEM_SUB_SEL, clk_cfg[12], 24, 4, clk_cfg_update[1], 20),
CKSYS_MUX_UPD(CLK_TOP_MEM_SUB_PERI_SEL, clk_cfg[13], 0, 3, clk_cfg_update[1], 21),
CKSYS_MUX_UPD(CLK_TOP_MEM_SUB_U_SEL, clk_cfg[13], 8, 3, clk_cfg_update[1], 22),
CKSYS_MUX_UPD(CLK_TOP_EMI_N_SEL, clk_cfg[13], 16, 3, clk_cfg_update[1], 23),
CKSYS_MUX_UPD(CLK_TOP_DXCC_SEL, clk_cfg[15], 24, 2, clk_cfg_update[2], 1),
CKSYS_MUX_UPD(CLK_TOP_DP_SEL, clk_cfg[16], 16, 3, clk_cfg_update[2], 4),
CKSYS_MUX_UPD(CLK_TOP_EDP_SEL, clk_cfg[16], 24, 3, clk_cfg_update[2], 5),
@ -250,7 +254,9 @@ static const struct mux_sel mux_sels[] = {
{ .id = CLK_TOP_AUDIO_H_SEL, .sel = 3 },
{ .id = CLK_TOP_MCUPM_SEL, .sel = 2 },
{ .id = CLK_TOP_MEM_SUB_SEL, .sel = 9 },
{ .id = CLK_TOP_MEM_SUB_PERI_SEL, .sel = 7 },
{ .id = CLK_TOP_MEM_SUB_U_SEL, .sel = 7 },
{ .id = CLK_TOP_EMI_N_SEL, .sel = 2 },
{ .id = CLK_TOP_DXCC_SEL, .sel = 1 },
{ .id = CLK_TOP_DP_SEL, .sel = 4 },
{ .id = CLK_TOP_EDP_SEL, .sel = 4 },