mb/google/fatcat/var/lapis: Adjust touchpanel power on timing
GPP_F08 -> EN_TCHSCR_PWR GPP_F16 -> TOUCHPANEL_RESET# Adjust touchpanel's power on timings: 1. EN_TCHSCR_PWR go high before L_VDDEN_PCH during power on 2. TOUCHPANEL_RESET# high after EN_TCHSCR_PWR high when power on BUG=b:462913972 TEST=emerge-fatcat coreboot the EE measured the power-on timing of the touchscreen, and it met the requirements. Change-Id: I4e50223477003ff93d4751527196894cc0a3e781 Signed-off-by: Hualin Wei <weihualin@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90243 Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
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1 changed files with 6 additions and 2 deletions
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@ -263,8 +263,6 @@ static const struct pad_config gpio_table[] = {
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PAD_NC(GPP_F06, NONE),
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/* GPP_F07: Not used */
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PAD_NC(GPP_F07, NONE),
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/* GPP_F08: TCHSCR_PWR_EN */
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PAD_CFG_GPO(GPP_F08, 1, DEEP),
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/* GPP_F09: NC */
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PAD_NC(GPP_F09, NONE),
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/* GPP_F10: NC */
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@ -398,6 +396,9 @@ static const struct pad_config early_gpio_table[] = {
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/* GPP_E19: FP_PWR_EN */
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PAD_CFG_GPO(GPP_E19, 1, PLTRST),
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/* GPP_F16: THC0_SPI1_RST_N_TCH_PNL1 */
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PAD_CFG_GPO(GPP_F16, 0, DEEP),
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/* GPP_H08: UART0_BUF_RXD */
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PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1),
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/* GPP_H09: UART0_BUF_TXD */
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@ -409,6 +410,9 @@ static const struct pad_config early_gpio_table[] = {
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PAD_CFG_NF(GPP_H07, NONE, DEEP, NF1),
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/* GPP_E02: GSC_SOC_INT_ODL */
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PAD_CFG_GPI_APIC_LOCK(GPP_E02, NONE, LEVEL, INVERT, LOCK_CONFIG),
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/* GPP_F08: TCHSCR_PWR_EN */
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PAD_CFG_GPO(GPP_F08, 1, DEEP),
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};
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/* Pad configuration in romstage */
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