updated to pci_find_device
This commit is contained in:
Andrew Ip
parent
de7cd2237c
commit
78ba87d6be
1 changed files with 137 additions and 77 deletions
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@ -1,29 +1,53 @@
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#include <pci.h>
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#include <pc80/keyboard.h>
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#include <printk.h>
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#include <pci_ids.h>
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void keyboard_on()
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{
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volatile unsigned char regval;
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struct pci_dev *dev;
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/* pcibios_read_config_byte(0, 0x88, 0x51, ®val); */
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/*regval |= 0x01; */
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printk_debug("keyboard_on\n");
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regval = 0xcf;
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pcibios_write_config_byte(0, 0x88, 0x51, regval);
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dev = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
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if (dev) {
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pci_write_config_byte(dev, 0x51, regval);
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}
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/* disable USB1 */
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pcibios_write_config_byte(0, 0x8A, 0x3c, 0x00);
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pcibios_write_config_byte(0, 0x8A, 0x04, 0x00);
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pcibios_read_config_byte(0, 0x88, 0x50, ®val);
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regval |= 0x10;
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pcibios_read_config_byte(0, 0x88, 0x50, regval);
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dev = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, 0);
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if (dev) {
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pci_write_config_byte(dev, 0x3c, 0x00);
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}
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if (dev) {
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pci_write_config_byte(dev, 0x04, 0x00);
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}
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dev = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
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if (dev) {
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pci_read_config_byte(dev, 0x50, ®val);
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regval |= 0x10;
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pci_write_config_byte(dev, 0x50, regval);
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}
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/* disable USB2 */
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pcibios_write_config_byte(0, 0x8B, 0x3c, 0x00);
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pcibios_write_config_byte(0, 0x8B, 0x04, 0x00);
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pcibios_read_config_byte(0, 0x88, 0x50, ®val);
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regval |= 0x20;
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pcibios_write_config_byte(0, 0x88, 0x50, regval);
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dev = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, \
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dev);
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if (dev) {
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pci_write_config_byte(dev, 0x3c, 0x00);
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}
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if (dev) {
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pci_write_config_byte(dev, 0x04, 0x00);
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}
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dev = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
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if (dev) {
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pci_read_config_byte(dev, 0x50, ®val);
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regval |= 0x20;
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pci_write_config_byte(dev, 0x50, regval);
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}
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pc_keyboard_init();
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@ -31,94 +55,130 @@ void keyboard_on()
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void nvram_on()
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{
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/* the VIA 686A South has a very different nvram setup than the piix4e ... */
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/* the VIA 8231 South has a very different nvram setup than the piix4e ... */
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/* turn on ProMedia nvram. */
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/* TO DO: use the PciWriteByte function here. */
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pcibios_write_config_byte(0, 0x88, 0x41, 0xff);
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struct pci_dev *dev;
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dev = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
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if (dev) {
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pci_write_config_byte(dev, 0x41, 0xc0);
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}
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}
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void southbridge_fixup()
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{
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unsigned int devfn;
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unsigned char enables;
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struct pci_dev *dev;
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struct pci_dev *dev0;
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struct pci_dev dev_cpy;
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unsigned int devfn;
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// enable the internal I/O decode
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// to do: use the pcibios_find function here, instead of
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// hard coding the devfn.
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devfn = PCI_DEVFN(17, 0);
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enables = pcibios_read_config_byte(0, devfn, 0x6C, &enables);
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enables |= 0x80;
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pcibios_write_config_byte(0, devfn, 0x6C, enables);
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dev0 = 0;
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dev = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
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if (dev) {
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dev0 = dev;
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memcpy(&dev_cpy, dev, sizeof(dev_cpy));
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pci_read_config_byte(dev, 0x6c, &enables);
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enables |= 0x80;
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pci_write_config_byte(dev, 0x6c, enables);
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} else {
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printk_debug("IDE pci_find_device function 0 failed\n");
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}
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#ifndef DISABLE_SOUTHBRIDGE_COM_PORTS
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// enable com1 and com2.
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enables = pcibios_read_config_byte(0, devfn, 0x6e, &enables);
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// 0x80 is enable com port b, 0x1 is to make it com2, 0x8 is enable com port a as com1
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enables = 0x80 | 0x1 | 0x8 ;
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pcibios_write_config_byte(0, devfn, 0x6e, enables);
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// note: this is also a redo of some port of assembly, but we want everything up.
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if (dev) {
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pci_write_config_byte(dev, 0x6e, enables);
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}
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// note: this is also a redo of some port of assembly, but we
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// want everything up.
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// set com1 to 115 kbaud
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// not clear how to do this yet.
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// forget it; done in assembly.
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#endif
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// enable IDE, since Linux won't do it.
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// First do some more things to devfn (17,0)
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// note: this should already be cleared, according to the book.
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pcibios_read_config_byte(0, devfn, 0x50, &enables);
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printk_debug("IDE enable in reg. 50 is 0x%x\n", enables);
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enables &= ~8; // need manifest constant here!
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printk_debug("set IDE reg. 50 to 0x%x\n", enables);
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pcibios_write_config_byte(0, devfn, 0x50, enables);
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if (dev) {
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pci_read_config_byte(dev, 0x50, &enables);
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printk_debug("IDE enable in reg. 50 is 0x%x\n", enables);
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enables &= ~8; // need manifest constant here!
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printk_debug("set IDE reg. 50 to 0x%x\n", enables);
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pci_write_config_byte(dev, 0x50, enables);
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}
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// set default interrupt values (IDE)
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pcibios_read_config_byte(0, devfn, 0x4c, &enables);
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printk_debug("IRQs in reg. 4c are 0x%x\n", enables & 0xf);
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// clear out whatever was there.
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enables &= ~0xf;
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enables |= 4;
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printk_debug("setting reg. 4c to 0x%x\n", enables);
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pcibios_write_config_byte(0, devfn, 0x4c, enables);
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if (dev) {
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pci_read_config_byte(dev, 0x4c, &enables);
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printk_debug("IRQs in reg. 4c are 0x%x\n", enables & 0xf);
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// clear out whatever was there.
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enables &= ~0xf;
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enables |= 4;
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printk_debug("setting reg. 4c to 0x%x\n", enables);
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pci_write_config_byte(dev, 0x4c, enables);
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}
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// set up the serial port interrupts.
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// com2 to 3, com1 to 4
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pcibios_write_config_byte(0, devfn, 0x46, 0x04);
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pcibios_write_config_byte(0, devfn, 0x47, 0x03);
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devfn = PCI_DEVFN(17, 1);
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pcibios_read_config_byte(0, devfn, 0x40, &enables);
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printk_debug("enables in reg 0x40 0x%x\n", enables);
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enables |= 3;
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pcibios_write_config_byte(0, devfn, 0x40, enables);
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pcibios_read_config_byte(0, devfn, 0x40, &enables);
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printk_debug("enables in reg 0x40 read back as 0x%x\n", enables);
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if (dev) {
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pci_write_config_byte(dev, 0x46, 0x04);
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pci_write_config_byte(dev, 0x47, 0x03);
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}
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dev = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, 0);
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if (!dev) {
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if (dev0) {
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dev = &dev_cpy;
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dev_cpy.devfn |= 1;
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}
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}
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if (!dev) {
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printk_debug("IDE pci_find_device function 1 failed\n");
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} else {
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pci_read_config_byte(dev, 0x40, &enables);
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printk_debug("enables in reg 0x40 0x%x\n", enables);
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enables |= 3;
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pci_write_config_byte(dev, 0x40, enables);
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pci_read_config_byte(dev, 0x40, &enables);
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printk_debug("enables in reg 0x40 read back as 0x%x\n", \
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enables);
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}
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// address decoding.
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// we want "flexible", i.e. 1f0-1f7 etc. or native PCI
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pcibios_read_config_byte(0, devfn, 0x9, &enables);
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printk_debug("enables in reg 0x9 0x%x\n", enables);
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// by the book, set the low-order nibble to 0xa.
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enables &= ~0xf;
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// cf/cg silicon needs an 'f' here.
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enables |= 0xf;
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pcibios_write_config_byte(0, devfn, 0x9, enables);
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pcibios_read_config_byte(0, devfn, 0x9, &enables);
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printk_debug("enables in reg 0x9 read back as 0x%x\n", enables);
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// standard bios sets master bit.
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pcibios_read_config_byte(0, devfn, 0x4, &enables);
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printk_debug("command in reg 0x4 0x%x\n", enables);
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enables |= 5;
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pcibios_write_config_byte(0, devfn, 0x4, enables);
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pcibios_read_config_byte(0, devfn, 0x4, &enables);
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printk_debug("command in reg 0x4 reads back as 0x%x\n", enables);
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// oh well, the PCI BARs don't work right.
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// This chip will not work unless IDE runs at standard legacy
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// values.
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pcibios_write_config_dword(0, devfn, 0x10, 0x1f1);
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pcibios_write_config_dword(0, devfn, 0x14, 0x3f5);
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pcibios_write_config_dword(0, devfn, 0x18, 0x171);
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pcibios_write_config_dword(0, devfn, 0x1c, 0x375);
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pcibios_write_config_dword(0, devfn, 0x20, 0xcc0);
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if (dev) {
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pci_read_config_byte(dev, 0x9, &enables);
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printk_debug("enables in reg 0x9 0x%x\n", enables);
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// by the book, set the low-order nibble to 0xa.
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enables &= ~0xf;
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// cf/cg silicon needs an 'f' here.
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enables |= 0xf;
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pci_write_config_byte(dev, 0x9, enables);
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pci_read_config_byte(dev, 0x9, &enables);
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printk_debug("enables in reg 0x9 read back as 0x%x\n", enables);
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// standard bios sets master bit.
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pci_read_config_byte(dev, 0x4, &enables);
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printk_debug("command in reg 0x4 0x%x\n", enables);
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enables |= 5;
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pci_write_config_byte(dev, 0x4, enables);
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pci_read_config_byte(dev, 0x4, &enables);
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printk_debug("command in reg 0x4 reads back as 0x%x\n", \
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enables);
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// oh well, the PCI BARs don't work right.
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// This chip will not work unless IDE runs at standard legacy
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// values.
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pci_write_config_dword(dev, 0x10, 0x1f1);
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pci_write_config_dword(dev, 0x14, 0x3f5);
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pci_write_config_dword(dev, 0x18, 0x171);
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pci_write_config_dword(dev, 0x1c, 0x375);
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pci_write_config_dword(dev, 0x20, 0xcc0);
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}
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}
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