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Mickey: Update Hynix memory configuration

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Updating Hynix memory configuration for mickey so that it can boot on Hynix board.

BUG=chrome-os-partner:48637
BRANCH=master
TEST=Boot on mickey hynix board

Change-Id: Id63d74cac36b9fd84bdb88969291982e14fa7d01
Signed-off-by: Lang Zhang <kingsley_zhang@asus.com>
Reviewed-on: https://chromium-review.googlesource.com/320623
Commit-Ready: lang zhang <kingsley_zhang@asus.com>
Tested-by: lang zhang <kingsley_zhang@asus.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/322633
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Lang Zhang 2016-01-06 16:47:04 +08:00 • committed by ChromeOS bot
commit 7690e85eca
2 changed files with 80 additions and 1 deletions
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2
src/mainboard/google/veyron_mickey/sdram_configs.c
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@ -28,7 +28,7 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-lpddr3-samsung-2GB.inc" /* ram_code = 0000 */
#include "sdram_inf/sdram-lpddr3-hynix-2GB.inc" /* ram_code = 0001 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 0010 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 0011 */
#include "sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc" /* ram_code = 0011 */
#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 0100 */
#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 0101 */
#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 0110 */

79
src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc Normal file
View file

@ -0,0 +1,79 @@
{
/* Hynix H9CCNNNBPTBLBR-NUD chips */
{
{
.rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x2,
.row_3_4 = 0x0,
.cs0_row = 0xE,
.cs1_row = 0xE
},
{
.rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x2,
.row_3_4 = 0x0,
.cs0_row = 0xE,
.cs1_row = 0xE
}
},
{
.togcnt1u = 0x215,
.tinit = 0xC8,
.trsth = 0x0,
.togcnt100n = 0x35,
.trefi = 0x26,
.tmrd = 0x2,
.trfc = 0x70,
.trp = 0x2000D,
.trtw = 0x6,
.tal = 0x0,
.tcl = 0x8,
.tcwl = 0x4,
.tras = 0x17,
.trc = 0x24,
.trcd = 0xD,
.trrd = 0x6,
.trtp = 0x4,
.twr = 0x8,
.twtr = 0x4,
.texsr = 0x76,
.txp = 0x4,
.txpdll = 0x0,
.tzqcs = 0x30,
.tzqcsi = 0x0,
.tdqs = 0x1,
.tcksre = 0x2,
.tcksrx = 0x2,
.tcke = 0x4,
.tmod = 0x0,
.trstl = 0x0,
.tzqcl = 0xC0,
.tmrr = 0x4,
.tckesr = 0x8,
.tdpd = 0x1F4
},
{
.dtpr0 = 0x48D7DD93,
.dtpr1 = 0x187008D8,
.dtpr2 = 0x121076,
.mr[0] = 0x0,
.mr[1] = 0xC3,
.mr[2] = 0x6,
/* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */
.mr[3] = 0x2
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
.ddrconfig = 2,
.ddr_freq = 533*MHz,
.dramtype = LPDDR3,
.num_channels = 2,
.stride = 9,
.odt = 1,
},