soc/intel/alderlake: Remove SOC_INTEL_GFX_MBUS_JOIN config
This patch removes the SOC_INTEL_GFX_MBUS_JOIN configuration option. Support for fast modeset joining has been added to the mainline i915 kernel driver (https://patchwork.freedesktop.org/series/130480/), making this coreboot-specific workaround unnecessary. BUG=b:291885733 TEST=Successful build and boot of google/marasov with single and dual displays, no redundant boot splash. Change-Id: I53c08a0e7a40b24db7cc910c5b9adc2376a9bb17 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paz Zcharya <pazz@google.com> Reviewed-by: YH Lin <yueherngl@google.com> Reviewed-by: Dinesh Gehlot <digehlot@google.com>
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@ -86,7 +86,6 @@ config SOC_INTEL_ALDERLAKE
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select SOC_INTEL_COMMON_RESET
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select SOC_INTEL_CSE_SEND_EOP_LATE if !BOARD_GOOGLE_BRYA_COMMON && !BOARD_GOOGLE_BROX_COMMON
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select SOC_INTEL_CSE_SET_EOP
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select SOC_INTEL_GFX_MBUS_JOIN if MAINBOARD_HAS_CHROMEOS && BMP_LOGO
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select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
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select HAVE_INTEL_COMPLIANCE_TEST_MODE
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select SSE2
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