From 70d1f1a2d6d3abad4efc23600365f1e3e6dd3cfb Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Thu, 16 Jan 2025 16:13:40 +0100 Subject: [PATCH] tree: Use boolean for deep_s{3,5}_enable_{ac,dc} MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I1621e98e7925b140c608f893a6680c9384bac2f0 Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/86020 Tested-by: build bot (Jenkins) Reviewed-by: Jérémy Compostella --- src/mainboard/51nb/x210/devicetree.cb | 8 ++++---- src/mainboard/erying/tgl/devicetree.cb | 8 ++++---- src/mainboard/facebook/monolith/devicetree.cb | 4 ++-- src/mainboard/google/eve/devicetree.cb | 8 ++++---- .../google/fizz/variants/baseboard/devicetree.cb | 8 ++++---- src/mainboard/google/glados/devicetree.cb | 8 ++++---- src/mainboard/google/poppy/variants/atlas/devicetree.cb | 8 ++++---- .../google/poppy/variants/baseboard/devicetree.cb | 8 ++++---- src/mainboard/google/poppy/variants/nami/devicetree.cb | 8 ++++---- .../google/poppy/variants/nautilus/devicetree.cb | 8 ++++---- .../google/poppy/variants/nocturne/devicetree.cb | 8 ++++---- src/mainboard/google/poppy/variants/rammus/devicetree.cb | 8 ++++---- src/mainboard/google/poppy/variants/soraka/devicetree.cb | 8 ++++---- .../intel/kblrvp/variants/baseboard/devicetree.cb | 4 ++-- src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb | 4 ++-- src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb | 4 ++-- src/mainboard/intel/kunimitsu/devicetree.cb | 4 ++-- src/mainboard/intel/saddlebrook/devicetree.cb | 4 ++-- src/mainboard/lenovo/m900_tiny/devicetree.cb | 4 ++-- src/mainboard/libretrend/lt1000/devicetree.cb | 8 ++++---- src/mainboard/protectli/vault_kbl/devicetree.cb | 8 ++++---- src/mainboard/purism/librem_skl/devicetree.cb | 8 ++++---- src/mainboard/razer/blade_stealth_kbl/devicetree.cb | 8 ++++---- src/soc/intel/elkhartlake/chip.h | 8 ++++---- src/soc/intel/tigerlake/chip.h | 8 ++++---- 25 files changed, 86 insertions(+), 86 deletions(-) diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index e489e25f18..9151d7f1db 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -10,10 +10,10 @@ chip soc/intel/skylake }" # Enable deep Sx states - register "deep_s3_enable_ac" = "1" - register "deep_s3_enable_dc" = "1" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "true" + register "deep_s3_enable_dc" = "true" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" register "eist_enable" = "true" diff --git a/src/mainboard/erying/tgl/devicetree.cb b/src/mainboard/erying/tgl/devicetree.cb index 55744c4445..0a0a01be5c 100644 --- a/src/mainboard/erying/tgl/devicetree.cb +++ b/src/mainboard/erying/tgl/devicetree.cb @@ -17,10 +17,10 @@ chip soc/intel/tigerlake register "eist_enable" = "1" register "enable_c6dram" = "1" - register "deep_s3_enable_ac" = "1" - register "deep_s3_enable_dc" = "1" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "true" + register "deep_s3_enable_dc" = "true" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" # PME routing register "pmc_gpe0_dw0" = "PMC_GPP_R" diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index ad735ed585..4c7aa16277 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -1,7 +1,7 @@ chip soc/intel/skylake - register "deep_s5_enable_ac" = "0" - register "deep_s5_enable_dc" = "0" + register "deep_s5_enable_ac" = "false" + register "deep_s5_enable_dc" = "false" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index c0779c664b..5c9ce5d7a7 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -13,10 +13,10 @@ chip soc/intel/skylake }" # Enable deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "1" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "true" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN" register "eist_enable" = "true" diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index 25114f055b..1eda1ab454 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -10,10 +10,10 @@ chip soc/intel/skylake }" # Deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN" register "eist_enable" = "true" diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 2d2e13cd52..4d3d517f78 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -13,10 +13,10 @@ chip soc/intel/skylake }" # Enable deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 04df902461..0e1d21051f 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -13,10 +13,10 @@ chip soc/intel/skylake }" # Deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" # GPE configuration diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 1e39241f8c..5180bd9619 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -4,10 +4,10 @@ chip soc/intel/skylake register "gfx" = "GMA_STATIC_DISPLAYS(0)" # Deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" # GPE configuration diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index d28aff92c7..4a69cb3aca 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -13,10 +13,10 @@ chip soc/intel/skylake }" # Deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "1" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "true" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" # GPE configuration diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 363b614cfa..f6116effa1 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -13,10 +13,10 @@ chip soc/intel/skylake }" # Deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" # GPE configuration diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 97b0c20a6d..15732388e8 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -4,10 +4,10 @@ chip soc/intel/skylake register "gfx" = "GMA_STATIC_DISPLAYS(0)" # Deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" register "eist_enable" = "true" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 3743385eec..5a12bdc62e 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -13,10 +13,10 @@ chip soc/intel/skylake }" # Deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" # GPE configuration diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 2d1a509218..1274b787d4 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -13,10 +13,10 @@ chip soc/intel/skylake }" # Deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" # GPE configuration diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb index be5ba449d6..dc44770762 100644 --- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb @@ -1,8 +1,8 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s5_enable_ac" = "0" - register "deep_s5_enable_dc" = "0" + register "deep_s5_enable_ac" = "false" + register "deep_s5_enable_dc" = "false" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb index c4f8d46dbb..29aea403bc 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb @@ -1,8 +1,8 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index 96bd56bdbf..a2d24597e1 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -1,8 +1,8 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" # FSP Configuration register "ScsEmmcHs400Enabled" = "0" diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 458f55921c..e5480e2ba9 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -1,8 +1,8 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 968e2a666b..74a183bf48 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -2,8 +2,8 @@ chip soc/intel/skylake - register "deep_s5_enable_ac" = "0" - register "deep_s5_enable_dc" = "0" + register "deep_s5_enable_ac" = "false" + register "deep_s5_enable_dc" = "false" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/lenovo/m900_tiny/devicetree.cb b/src/mainboard/lenovo/m900_tiny/devicetree.cb index 51d3b26798..b923ec76c5 100644 --- a/src/mainboard/lenovo/m900_tiny/devicetree.cb +++ b/src/mainboard/lenovo/m900_tiny/devicetree.cb @@ -2,8 +2,8 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN" register "eist_enable" = "true" diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb index 4f7d7eb631..f129128d8a 100644 --- a/src/mainboard/libretrend/lt1000/devicetree.cb +++ b/src/mainboard/libretrend/lt1000/devicetree.cb @@ -1,10 +1,10 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_WAKE_PIN" register "eist_enable" = "true" diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb index 9b0357f654..d2d55dec92 100644 --- a/src/mainboard/protectli/vault_kbl/devicetree.cb +++ b/src/mainboard/protectli/vault_kbl/devicetree.cb @@ -1,10 +1,10 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "1" - register "deep_s5_enable_dc" = "1" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "true" + register "deep_s5_enable_dc" = "true" register "deep_sx_config" = "DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" register "s0ix_enable" = true diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb index 5b448f91cd..610c737c70 100644 --- a/src/mainboard/purism/librem_skl/devicetree.cb +++ b/src/mainboard/purism/librem_skl/devicetree.cb @@ -12,10 +12,10 @@ chip soc/intel/skylake .backlight_pwm_hz = 200, }" - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "0" - register "deep_s5_enable_dc" = "0" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "false" + register "deep_s5_enable_dc" = "false" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" register "eist_enable" = "true" diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb index 311d96cc9b..426a2899c7 100644 --- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb +++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb @@ -1,8 +1,8 @@ chip soc/intel/skylake - register "deep_s3_enable_ac" = "0" - register "deep_s3_enable_dc" = "0" - register "deep_s5_enable_ac" = "0" - register "deep_s5_enable_dc" = "0" + register "deep_s3_enable_ac" = "false" + register "deep_s3_enable_dc" = "false" + register "deep_s5_enable_ac" = "false" + register "deep_s5_enable_dc" = "false" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" register "eist_enable" = "true" diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h index 061621cc3e..397372d98d 100644 --- a/src/soc/intel/elkhartlake/chip.h +++ b/src/soc/intel/elkhartlake/chip.h @@ -133,10 +133,10 @@ struct soc_intel_elkhartlake_config { bool dptf_enable; /* Deep SX enable for both AC and DC */ - int deep_s3_enable_ac; - int deep_s3_enable_dc; - int deep_s5_enable_ac; - int deep_s5_enable_dc; + bool deep_s3_enable_ac; + bool deep_s3_enable_dc; + bool deep_s5_enable_ac; + bool deep_s5_enable_dc; /* Deep Sx Configuration * DSX_EN_WAKE_PIN - Enable WAKE# pin diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index f0cecb3fa7..437f015902 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -152,10 +152,10 @@ struct soc_intel_tigerlake_config { bool dptf_enable; /* Deep SX enable for both AC and DC */ - int deep_s3_enable_ac; - int deep_s3_enable_dc; - int deep_s5_enable_ac; - int deep_s5_enable_dc; + bool deep_s3_enable_ac; + bool deep_s3_enable_dc; + bool deep_s5_enable_ac; + bool deep_s5_enable_dc; /* Deep Sx Configuration * DSX_EN_WAKE_PIN - Enable WAKE# pin