soc/intel/pantherlake: Fix fast_vmode_i_trip array indexing
Fix incorrect indexing for fast_vmode_i_trip arrays. This patch ensures consistent SKU-based indexing across the VR configuration. BUG=b:481561587 TEST=Verify VR parameters are correctly applied in FSP debug log Change-Id: I532d9fc51d7d1342f2f0464f7aeacffe0b603267 Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/91002 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Pranava Y N <pranavayn@google.com>
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2 changed files with 5 additions and 5 deletions
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@ -378,18 +378,18 @@ struct soc_intel_pantherlake_config {
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* Fast Vmode I_TRIP Thresholds for VR Domains
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*
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* This two-dimensional array represents the Fast Vmode I_TRIP thresholds
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* for various Voltage Regulator (VR) domains across different power limit
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* configurations in Panther Lake SoCs.
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* for various Voltage Regulator (VR) domains across different SKUs
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* in Panther Lake SoCs.
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*
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* The Fast Vmode I_TRIP threshold is used to override the default current
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* threshold settings, ensuring optimal power management by adapting to
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* specific VR domain requirements under different power limit scenarios.
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* specific VR domain requirements for each SKU's hardware capabilities.
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*
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* 0-255A in 1/4 A units. Example: 400 = 100A
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* This setting overrides the default value set by FSPs when Fast VMode
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* is enabled.
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*/
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uint16_t fast_vmode_i_trip[PTL_POWER_LIMITS_COUNT][NUM_VR_DOMAINS];
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uint16_t fast_vmode_i_trip[MAX_PTL_SKUS][NUM_VR_DOMAINS];
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/*
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* Power state current threshold 1.
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@ -348,7 +348,7 @@ static void fill_fspm_vr_config_params(FSP_M_CONFIG *m_cfg,
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m_cfg->CepEnable[i] = config->cep_enable[i];
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if (config->enable_fast_vmode[i]) {
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m_cfg->EnableFastVmode[i] = config->enable_fast_vmode[i];
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m_cfg->IccLimit[i] = config->fast_vmode_i_trip[map->limits][i];
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m_cfg->IccLimit[i] = config->fast_vmode_i_trip[map->sku][i];
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}
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}
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