From 708b2b7779d32d807c2d39596a77a0a869c4ac99 Mon Sep 17 00:00:00 2001 From: Sowmya Aralguppe Date: Fri, 30 Jan 2026 13:46:36 +0530 Subject: [PATCH] soc/intel/pantherlake: Fix fast_vmode_i_trip array indexing MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix incorrect indexing for fast_vmode_i_trip arrays. This patch ensures consistent SKU-based indexing across the VR configuration. BUG=b:481561587 TEST=Verify VR parameters are correctly applied in FSP debug log Change-Id: I532d9fc51d7d1342f2f0464f7aeacffe0b603267 Signed-off-by: Sowmya Aralguppe Reviewed-on: https://review.coreboot.org/c/coreboot/+/91002 Tested-by: build bot (Jenkins) Reviewed-by: Jérémy Compostella Reviewed-by: Pranava Y N --- src/soc/intel/pantherlake/chip.h | 8 ++++---- src/soc/intel/pantherlake/romstage/fsp_params.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/soc/intel/pantherlake/chip.h b/src/soc/intel/pantherlake/chip.h index 15a1501e18..1d75b0ae43 100644 --- a/src/soc/intel/pantherlake/chip.h +++ b/src/soc/intel/pantherlake/chip.h @@ -378,18 +378,18 @@ struct soc_intel_pantherlake_config { * Fast Vmode I_TRIP Thresholds for VR Domains * * This two-dimensional array represents the Fast Vmode I_TRIP thresholds - * for various Voltage Regulator (VR) domains across different power limit - * configurations in Panther Lake SoCs. + * for various Voltage Regulator (VR) domains across different SKUs + * in Panther Lake SoCs. * * The Fast Vmode I_TRIP threshold is used to override the default current * threshold settings, ensuring optimal power management by adapting to - * specific VR domain requirements under different power limit scenarios. + * specific VR domain requirements for each SKU's hardware capabilities. * * 0-255A in 1/4 A units. Example: 400 = 100A * This setting overrides the default value set by FSPs when Fast VMode * is enabled. */ - uint16_t fast_vmode_i_trip[PTL_POWER_LIMITS_COUNT][NUM_VR_DOMAINS]; + uint16_t fast_vmode_i_trip[MAX_PTL_SKUS][NUM_VR_DOMAINS]; /* * Power state current threshold 1. diff --git a/src/soc/intel/pantherlake/romstage/fsp_params.c b/src/soc/intel/pantherlake/romstage/fsp_params.c index d6f628b36a..bef87158d7 100644 --- a/src/soc/intel/pantherlake/romstage/fsp_params.c +++ b/src/soc/intel/pantherlake/romstage/fsp_params.c @@ -348,7 +348,7 @@ static void fill_fspm_vr_config_params(FSP_M_CONFIG *m_cfg, m_cfg->CepEnable[i] = config->cep_enable[i]; if (config->enable_fast_vmode[i]) { m_cfg->EnableFastVmode[i] = config->enable_fast_vmode[i]; - m_cfg->IccLimit[i] = config->fast_vmode_i_trip[map->limits][i]; + m_cfg->IccLimit[i] = config->fast_vmode_i_trip[map->sku][i]; } }