baytrail: stop e820 reserving default SMM region

The default SMM region was previously being reserved.
Stop doing that in order to not antagonize certain kernel
loaders and payloads when there are low e820 ram
reservations. Since the default SMM region is not marked
as reserved the region needs backed up and restored on
resume.

BUG=chrome-os-partner:26563
BRANCH=baytrail
TEST=Built and booted. Suspended and resumed. Confirmed no more
     e820 reservations at default SMM region. Also noted resume
     times are still at ~200ms.

Change-Id: Icf21d40a790b0c1b0b8c2111f779abb996adce56
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/189084
This commit is contained in:
Aaron Durbin 2014-03-06 10:56:16 -06:00 committed by chrome-internal-fetch
commit 6fce823512
3 changed files with 7 additions and 8 deletions

View file

@ -9,6 +9,7 @@ if SOC_INTEL_BAYTRAIL
config CPU_SPECIFIC_OPTIONS
def_bool y
select ALT_CBFS_LOAD_PAYLOAD
select BACKUP_DEFAULT_SMM_REGION
select CACHE_MRC_SETTINGS
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select CACHE_ROM

View file

@ -105,6 +105,7 @@ void baytrail_init_cpus(device_t dev)
const struct pattrs *pattrs = pattrs_get();
struct mp_params mp_params;
uint32_t bsmrwac;
void *default_smm_area;
/* Set up MTRRs based on physical address size. */
x86_setup_fixed_mtrrs();
@ -118,6 +119,7 @@ void baytrail_init_cpus(device_t dev)
mp_params.num_records = ARRAY_SIZE(mp_steps);
mp_params.microcode_pointer = pattrs->microcode_patch;
default_smm_area = backup_default_smm_area();
/*
* Configure the BUNIT to allow dirty cache line evictions in non-SMM
@ -136,6 +138,8 @@ void baytrail_init_cpus(device_t dev)
if (mp_init(cpu_bus, &mp_params)) {
printk(BIOS_ERR, "MP initialization failure.\n");
}
restore_default_smm_area(default_smm_area);
}
static void baytrail_core_init(device_t cpu)

View file

@ -89,14 +89,8 @@ static void nc_read_resources(device_t dev)
mmconf = iosf_bunit_read(BUNIT_MMCONF_REG) & ~((1 << 28) - 1);
mmio_resource(dev, BUNIT_MMCONF_REG, RES_IN_KiB(mmconf), 256 * 1024);
/* 0 -> SMM_DEFAULT_BASE cacheable ram. */
ram_resource(dev, index++, 0, RES_IN_KiB(SMM_DEFAULT_BASE));
/* Default SMM region is cacheable but reserved for coreboot */
reserved_ram_resource(dev, index++, RES_IN_KiB(SMM_DEFAULT_BASE),
RES_IN_KiB(SMM_DEFAULT_SIZE));
/* SMM_DEFAULT_BASE + SMM_DEFAULT_SIZE - > 0xa0000 */
base_k = RES_IN_KiB(SMM_DEFAULT_BASE + SMM_DEFAULT_SIZE);
/* 0 -> 0xa0000 */
base_k = RES_IN_KiB(0);
size_k = RES_IN_KiB(0xa0000) - base_k;
ram_resource(dev, index++, base_k, size_k);