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soc/amd/glinda: Fill in fch_rt_device_enable_map

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Currently FSP modifies the AOAC bits of the FCH devices and
thus needs the current status passed via fch_rt_device_enable_map.
By default fch_rt_device_enable_map is 0, effectly disabling all FCH
devices, including the debug UART. This causes a hang at boot.

Fill fch_rt_device_enable_map in SoC code.

TEST=Can boot on amd/birman_plus again.

Change-Id: I00ef35ea6fe11939c4154940fef8cb902955fe27
Signed-off-by: Patrick Rudolph <patrick.rudolph@amd.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Patrick Rudolph 2026-01-08 16:46:56 +01:00 • committed by Felix Held
commit 6b61e4ce68
1 changed files with 27 additions and 0 deletions
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27
src/soc/amd/glinda/fsp_m_params.c
View file

@ -3,6 +3,7 @@
/* TODO: Update for Glinda */
/* TODO: See what can be moved to common */
#include <amdblocks/aoac.h>
#include <amdblocks/apob_cache.h>
#include <amdblocks/ioapic.h>
#include <amdblocks/memmap.h>
@ -13,6 +14,7 @@
#include <fsp/api.h>
#include <soc/platform_descriptors.h>
#include <soc/pci_devs.h>
#include <soc/aoac_defs.h>
#include <static.h>
#include <string.h>
#include <types.h>
@ -176,6 +178,31 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mcfg->usb_phy_ptr = 0;
}
/* Sync AOAC devices */
int fch_aoac_devs[] = {
FCH_AOAC_DEV_I2C0,
FCH_AOAC_DEV_I2C1,
FCH_AOAC_DEV_I2C2,
FCH_AOAC_DEV_I2C3,
FCH_AOAC_DEV_UART0,
FCH_AOAC_DEV_UART1,
FCH_AOAC_DEV_UART2,
FCH_AOAC_DEV_UART3,
FCH_AOAC_DEV_UART4,
FCH_AOAC_DEV_I3C0,
FCH_AOAC_DEV_I3C1,
FCH_AOAC_DEV_I3C2,
FCH_AOAC_DEV_I3C3,
};
for (int i = 0; i < ARRAY_SIZE(fch_aoac_devs); i++) {
const int mask = BIT(fch_aoac_devs[i]);
if (is_aoac_device_enabled(fch_aoac_devs[i]))
mcfg->fch_rt_device_enable_map |= mask;
else
mcfg->fch_rt_device_enable_map &= ~mask;
}
fsp_fill_pcie_ddi_descriptors(mcfg);
fsp_assign_ioapic_upds(mcfg);
mb_pre_fspm(mcfg);