soc/mediatek/common: Use array to represent spm_sw_rsv registers

This patch only revises the registers used by common/spm.c.

BUG=none
TEST=emerge-geralt coreboot && emerge-rauru corsola

Change-Id: I7f49e18e7907d59944e6eb3554df667d12b07399
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85624
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/mediatek/common/spm.c

@@ -67,8 +67,8 @@ void spm_set_pcm_flags(const struct pwr_ctrl *pwrctrl)
 
 	write32(&mtk_spm->spm_sw_flag_0, pcm_flags);
 	write32(&mtk_spm->spm_sw_flag_1, pcm_flags1);
-	write32(&mtk_spm->spm_sw_rsv_7, pcm_flags);
-	write32(&mtk_spm->spm_sw_rsv_8, pcm_flags1);
+	write32(&mtk_spm->spm_sw_rsv[7], pcm_flags);
+	write32(&mtk_spm->spm_sw_rsv[8], pcm_flags1);
 }
 
 static void spm_parse_firmware(struct mtk_mcu *mcu)

src/soc/mediatek/mt8186/include/soc/spm.h

@@ -415,15 +415,7 @@ struct mtk_spm_regs {
 	uint32_t spm_sw_debug_0;
 	uint32_t spm_sw_flag_1;
 	uint32_t spm_sw_debug_1;
-	uint32_t spm_sw_rsv_0;
-	uint32_t spm_sw_rsv_1;
-	uint32_t spm_sw_rsv_2;
-	uint32_t spm_sw_rsv_3;
-	uint32_t spm_sw_rsv_4;
-	uint32_t spm_sw_rsv_5;
-	uint32_t spm_sw_rsv_6;
-	uint32_t spm_sw_rsv_7;
-	uint32_t spm_sw_rsv_8;
+	uint32_t spm_sw_rsv[9];
 	uint32_t spm_bk_wake_event;
 	uint32_t spm_bk_vtcxo_dur;
 	uint32_t spm_bk_wake_misc;

src/soc/mediatek/mt8188/include/soc/spm.h

@@ -733,15 +733,7 @@ struct mtk_spm_regs {
 	u32 spm_sw_debug_0;
 	u32 spm_sw_flag_1;
 	u32 spm_sw_debug_1;
-	u32 spm_sw_rsv_0;
-	u32 spm_sw_rsv_1;
-	u32 spm_sw_rsv_2;
-	u32 spm_sw_rsv_3;
-	u32 spm_sw_rsv_4;
-	u32 spm_sw_rsv_5;
-	u32 spm_sw_rsv_6;
-	u32 spm_sw_rsv_7;
-	u32 spm_sw_rsv_8;
+	u32 spm_sw_rsv[9];
 	u32 spm_bk_wake_event;
 	u32 spm_bk_vtcxo_dur;
 	u32 spm_bk_wake_misc;

src/soc/mediatek/mt8192/include/soc/spm.h

@@ -603,9 +603,8 @@ struct mtk_spm_regs {
 	u32 spm_sw_flag_0;
 	u32 spm_sw_debug_0;
 	u32 spm_sw_flag_1;
-	u32 reserved11[8];
-	u32 spm_sw_rsv_7;
-	u32 spm_sw_rsv_8;
+	u32 spm_sw_debug_1;
+	u32 spm_sw_rsv[9];
 	u32 reserved12[203];
 	u32 spm_ack_chk_con_3;
 	u32 spm_ack_chk_pc_3;
@@ -645,8 +644,8 @@ check_member(mtk_spm_regs, ulposc_con, 0x420);
 check_member(mtk_spm_regs, spm_force_dvfs, 0x4fc);
 check_member(mtk_spm_regs, spm_sw_flag_0, 0x600);
 check_member(mtk_spm_regs, spm_sw_flag_1, 0x608);
-check_member(mtk_spm_regs, spm_sw_rsv_7, 0x62c);
-check_member(mtk_spm_regs, spm_sw_rsv_8, 0x630);
+check_member(mtk_spm_regs, spm_sw_rsv[7], 0x62c);
+check_member(mtk_spm_regs, spm_sw_rsv[8], 0x630);
 check_member(mtk_spm_regs, spm_ack_chk_con_3, 0x960);
 check_member(mtk_spm_regs, spm_ack_chk_timer_3, 0x96c);
 check_member(mtk_spm_regs, sys_timer_con, 0x98c);

src/soc/mediatek/mt8195/include/soc/spm.h

@@ -705,15 +705,7 @@ struct mtk_spm_regs {
 	u32 spm_sw_debug_0;
 	u32 spm_sw_flag_1;
 	u32 spm_sw_debug_1;
-	u32 spm_sw_rsv_0;
-	u32 spm_sw_rsv_1;
-	u32 spm_sw_rsv_2;
-	u32 spm_sw_rsv_3;
-	u32 spm_sw_rsv_4;
-	u32 spm_sw_rsv_5;
-	u32 spm_sw_rsv_6;
-	u32 spm_sw_rsv_7;
-	u32 spm_sw_rsv_8;
+	u32 spm_sw_rsv[9];
 	u32 spm_bk_wake_event;
 	u32 spm_bk_vtcxo_dur;
 	u32 spm_bk_wake_misc;