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ryu: Add support for full LPDDR3 SDRAM BCT init via BootROM

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Once LPDDR3 init is supported in the ryu romstage, this can
be reverted. Note that this 528MHz BCT has been pre-qualed
by NVIDIA AE's, but will be updated as more tuning is done.

BUG=none
BRANCH=none
TEST=Builds, BCT is in binary, but I have no HW here to test on

Change-Id: I315a9a5d56290bb5f51863b15053d2171db7b1e4
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-on: https://chromium-review.googlesource.com/208384
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Tom Warren 2014-07-16 09:03:45 -07:00 • committed by chrome-internal-fetch
commit 660e40cb47
5 changed files with 1403 additions and 2 deletions
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1
configs/config.rush_ryu
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@ -4,3 +4,4 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
CONFIG_CONSOLE_SERIAL=y
CONFIG_CONSOLE_CBMEM=y
CONFIG_MTS_DIRECTORY="3rdparty/mainboard/google/rush"
CONFIG_BOOTROM_SDRAM_INIT=y

4
src/mainboard/google/rush_ryu/bct/Makefile.inc
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@ -1,7 +1,7 @@
##
## This file is part of the coreboot project.
##
## Copyright 2013 Google Inc.
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
@ -21,6 +21,8 @@ bct-cfg-$(CONFIG_RUSH_RYU_BCT_CFG_EMMC) += emmc.cfg
bct-cfg-$(CONFIG_RUSH_RYU_BCT_CFG_SPI) += spi.cfg
bct-cfg-y += odmdata.cfg
bct-cfg-y += jtag.cfg
#NOTE: When full LPDDR3 SDRAM config is done in bootblock, remove this
bct-cfg-$(CONFIG_BOOTROM_SDRAM_INIT) += sdram-ryu-4GB-528-Micron-full.cfg
# Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate
# the include files (sdram-*.inc) by running "./cfg2inc.sh sdram-*.cfg".

1388
src/mainboard/google/rush_ryu/bct/sdram-ryu-4GB-528-Micron-full.cfg Normal file
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File diff suppressed because it is too large Load diff

6
src/soc/nvidia/tegra132/Kconfig
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@ -142,4 +142,10 @@ config TRUSTZONE_CARVEOUT_SIZE_MB
help
Size of Trust Zone area in MiB to reserve in memory map.
config BOOTROM_SDRAM_INIT
bool "SoC BootROM does SDRAM init with full BCT"
default n
help
Use during Ryu LPDDR3 bringup
endif

6
src/soc/nvidia/tegra132/romstage.c
View file

@ -37,9 +37,13 @@ void romstage(void)
printk(BIOS_INFO, "T132: romstage here\n");
#if CONFIG_BOOTROM_SDRAM_INIT
printk(BIOS_INFO, "T132 romstage: SDRAM init done by BootROM, RAMCODE = %d\n",
sdram_get_ram_code());
#else
sdram_init(get_sdram_config());
printk(BIOS_INFO, "T132 romstage: sdram_init done\n");
#endif
cbmem_initialize();
ccplex_cpu_prepare();