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armv8: correct dcache line size calculation

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The CCSIDR_EL1 register has cache attribute information
for a given cache selection in CSSELR_EL1. However, the
cache isn't being selected before reading CCSIDR_EL1.
Instead use CTR_EL0 which better fits with the semantics
of dcache_line_bytes(). CTR_EL0 has the minimum data cache
line size of all caches in the system encoded in 19:16 encoded
as lg(line size in words).

BUG=None
TEST=Built.

Change-Id: I2cbf888a93031736e668918de928c3a99c26bedd
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208720
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Aaron Durbin 2014-07-17 13:08:06 -05:00 • committed by chrome-internal-fetch
commit 8d5dfba35d
1 changed files with 6 additions and 5 deletions
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11
src/arch/arm64/armv8/cache.c
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@ -46,16 +46,17 @@ void tlb_invalidate_all(void)
unsigned int dcache_line_bytes(void)
{
uint32_t ccsidr;
uint32_t ctr_el0;
static unsigned int line_bytes = 0;
if (line_bytes)
return line_bytes;
ccsidr = raw_read_ccsidr_el1();
/* [2:0] - Indicates (Log2(number of words in cache line)) - 4 */
line_bytes = 1 << ((ccsidr & 0x7) + 4); /* words per line */
line_bytes *= sizeof(uint32_t); /* bytes per word */
ctr_el0 = raw_read_ctr_el0();
/* [19:16] - Indicates (Log2(number of words in cache line) */
line_bytes = 1 << ((ctr_el0 >> 16) & 0xf);
/* Bytes in a word (32-bit) */
line_bytes *= sizeof(uint32_t);
return line_bytes;
}