mb/starlabs/starbook/adl_n: Adjust eSPI GPIO

Set the GPIO that enables eSPI to PLTRST to ensure that eSPI works
in S3.

Change-Id: I7da5cf493a676ea106ab94fcb377bc8a29b72990
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86919
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Sean Rhodes 2025-03-18 13:45:50 +00:00 committed by Matt DeVillier
commit 653f191de9

View file

@ -157,7 +157,7 @@ const struct pad_config gpio_table[] = {
/* C5: Boot Strap Weak Internal PD 20K
Low: ESPI
High: Disabled */
PAD_CFG_GPO(GPP_C5, 0, DEEP),
PAD_CFG_GPO(GPP_C5, 0, PLTRST),
/* C6: SML 1 Clock */
PAD_NC(GPP_C6, NONE),
/* C7: SML 1 Data */