From 653f191de96bb8ebc063ab32cc3f2e09a71e129e Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Tue, 18 Mar 2025 13:45:50 +0000 Subject: [PATCH] mb/starlabs/starbook/adl_n: Adjust eSPI GPIO Set the GPIO that enables eSPI to PLTRST to ensure that eSPI works in S3. Change-Id: I7da5cf493a676ea106ab94fcb377bc8a29b72990 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/86919 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- src/mainboard/starlabs/starbook/variants/adl_n/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c index 1c17b974e4..54f597112a 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c @@ -157,7 +157,7 @@ const struct pad_config gpio_table[] = { /* C5: Boot Strap Weak Internal PD 20K Low: ESPI High: Disabled */ - PAD_CFG_GPO(GPP_C5, 0, DEEP), + PAD_CFG_GPO(GPP_C5, 0, PLTRST), /* C6: SML 1 Clock */ PAD_NC(GPP_C6, NONE), /* C7: SML 1 Data */